Contiki 3.x
adc.h
1 /*
2  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
3  * to the MC1322x project (http://mc1322x.devl.org)
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the Institute nor the names of its contributors
15  * may be used to endorse or promote products derived from this software
16  * without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * This file is part of libmc1322x: see http://mc1322x.devl.org
31  * for details.
32  *
33  *
34  */
35 
36 #ifndef ADC_H
37 #define ADC_H
38 
39 #include <stdint.h>
40 #include "utils.h"
41 
42 /* the Vbatt measurment reads about 200mV low --- trim by ADC_VBATT_TRIM */
43 /* correction tracks well --- within 50mV over 2.1V to 3.6V */
44 /* offset from correct for tags running from 3.29 vreg */
45 /* trim = 146 */
46 /* tag 1: -90mV */
47 /* tag 2: -30mV */
48 /* tag 3: -30mV */
49 /* tag 4: -40mV */
50 /* tag 5: +10mV */
51 /* tag 6: -40mV */
52 /* new trim 183 */
53 
54 /* without per unit calibration, vbatt is probably +/- 75mV */
55 #define ADC_VBATT_TRIM 183
56 
57 /* ADC registers are all 16-bit wide with 16-bit access only */
58 #define ADC_BASE (0x8000D000)
59 
60 /* Structure-based register definitions */
61 
62 struct ADC_struct {
63  union {
64  uint16_t COMP[8];
65  struct {
66  uint16_t COMP_0;
67  uint16_t COMP_1;
68  uint16_t COMP_2;
69  uint16_t COMP_3;
70  uint16_t COMP_4;
71  uint16_t COMP_5;
72  uint16_t COMP_6;
73  uint16_t COMP_7;
74  };
75  };
76  uint16_t BAT_COMP_OVER;
77  uint16_t BAT_COMP_UNDER;
78  union {
79  uint16_t SEQ_1;
80  struct ADC_SEQ_1 {
81  uint16_t CH0:1;
82  uint16_t CH1:1;
83  uint16_t CH2:1;
84  uint16_t CH3:1;
85  uint16_t CH4:1;
86  uint16_t CH5:1;
87  uint16_t CH6:1;
88  uint16_t CH7:1;
89  uint16_t BATT:1;
90  uint16_t :6;
91  uint16_t SEQ_MODE:1;
92  } SEQ_1bits;
93  };
94  union {
95  uint16_t SEQ_2;
96  struct ADC_SEQ_2 {
97  uint16_t CH0:1;
98  uint16_t CH1:1;
99  uint16_t CH2:1;
100  uint16_t CH3:1;
101  uint16_t CH4:1;
102  uint16_t CH5:1;
103  uint16_t CH6:1;
104  uint16_t CH7:1;
105  uint16_t :7;
106  uint16_t SEQ_MODE:1;
107  } SEQ_2bits;
108  };
109  union {
110  uint16_t CONTROL;
111  struct ADC_CONTROL {
112  uint16_t ON:1;
113  uint16_t TIMER1_ON:1;
114  uint16_t TIMER2_ON:1;
115  uint16_t SOFT_RESET:1;
116  uint16_t AD1_VREFHL_EN:1;
117  uint16_t AD2_VREFHL_EN:1;
118  uint16_t :6;
119  uint16_t COMPARE_IRQ_MASK:1;
120  uint16_t SEQ1_IRQ_MASK:1;
121  uint16_t SEQ2_IRQ_MASK:1;
122  uint16_t FIFO_IRQ_MASK:1;
123  } CONTROLbits;
124  };
125  uint16_t TRIGGERS;
126  uint16_t PRESCALE;
127  uint16_t reserved1;
128  uint16_t FIFO_READ;
129  uint16_t FIFO_CONTROL;
130  union {
131  uint16_t FIFO_STATUS;
132  struct ADC_FIFO_STATUS {
133  uint16_t LEVEL:4;
134  uint16_t FULL:1;
135  uint16_t EMPTY:1;
136  uint16_t :10;
137  } FIFO_STATUSbits;
138  };
139  uint16_t reserved2[5];
140  uint16_t SR_1_HIGH;
141  uint16_t SR_1_LOW;
142  uint16_t SR_2_HIGH;
143  uint16_t SR_2_LOW;
144  uint16_t ON_TIME;
145  uint16_t CONVERT_TIME;
146  uint16_t CLOCK_DIVIDER;
147  uint16_t reserved3;
148  union {
149  uint16_t OVERRIDE;
150  struct ADC_OVERRIDE {
151  uint16_t MUX1:4;
152  uint16_t MUX2:4;
153  uint16_t AD1_ON:1;
154  uint16_t AD2_ON:1;
155  uint16_t :6;
156  } OVERRIDEbits;
157  };
158  uint16_t IRQ;
159  uint16_t MODE;
160  uint16_t RESULT_1;
161  uint16_t RESULT_2;
162 };
163 
164 static volatile struct ADC_struct * const ADC = (void *) (ADC_BASE);
165 
166 #define NUM_ADC_CHAN 9
167 
168 #define adc_enable() (ADC->CONTROLbits.ON = 1)
169 #define adc_disable() (ADC->CONTROLbits.ON = 0)
170 #define adc_select_channels(chans) (ADC->SEQ_1 = (ADC->SEQ_1 & 0xFE00) | chans)
171 void adc_setup_chan(uint8_t channel);
172 
173 extern uint16_t adc_reading[NUM_ADC_CHAN];
174 /* use the internal reference to return adc_readings in mV */
175 #define adc_voltage(x) (adc_reading[x] * 1200/adc_reading[8])
176 /* return vbatt voltage in mV */
177 #define adc_vbatt 4095 * 1200/adc_reading[8] + ADC_VBATT_TRIM
178 
179 void ADC_flush(void);
180 uint16_t ADC_READ(void);
181 void read_scanners(void);
182 void adc_init(void);
183 void adc_service(void);
184 
185 #endif
adc_init
void adc_init(void)
Initializes the ADC controller.
Definition: adc.c:50
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