Contiki 3.x
port.h
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1 /*
2  * Copyright (c) 2011, George Oikonomou - <oikonomou@users.sourceforge.net>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the Institute nor the names of its contributors
14  * may be used to endorse or promote products derived from this software
15  * without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * This file is part of the Contiki operating system.
30  */
31 
32 /**
33  * \file
34  *
35  * \author
36  * George Oikonomou - <oikonomou@users.sourceforge.net>
37  */
38 
39 
40 #ifndef PORT_H_
41 #define PORT_H_
42 
43 #include "cc253x.h"
44 #include "sfr-bits.h"
45 /*---------------------------------------------------------------------------*/
46 /* Use these to configure your platform's hardware */
47 #define PORT_FUNC_GPIO(port,pin) PORT_FUNC_GPIO_X(port,pin)
48 #define PORT_FUNC_PER(port,pin) PORT_FUNC_PER_X(port,pin)
49 #define PORT0_ANALOG_IO(pin) PORT0_ANALOG_IO_X(pin)
50 #define PORT0_DIGITAL_IO(pin) PORT0_DIGITAL_IO_X(pin)
51 #define PORT_SET(port,pin) PORT_SET_X(port,pin)
52 #define PORT_CLEAR(port,pin) PORT_CLEAR_X(port,pin) PORT_CLEAR_X(port,pin)
53 #define PORT_TOGGLE(port,pin) PORT_TOGGLE_X(port,pin) PORT_TOGGLE_X(port,pin)
54 #define PORT_READ(port,pin) PORT_READ_X(port,pin)
55 #define PORT_WRITE(port,pin,v) PORT_WRITE_X(port,pin,v)
56 #define PORT_DIR_OUTPUT(port,pin) PORT_DIR_OUTPUT_X(port,pin)
57 #define PORT_DIR_INPUT(port,pin) PORT_DIR_INPUT_X(port,pin)
58 #define PORT_IRQ_ENABLE(port,pin) PORT_IRQ_ENABLE_X(port,pin)
59 #define PORT_IRQ_DISABLE(port,pin) PORT_IRQ_DISABLE_X(port,pin)
60 #define PORT_IRQ_ENABLED(port,pin) PORT_IRQ_ENABLED_X(port,pin)
61 #define PORT_IRQ_CHECK(port,pin) PORT_IRQ_CHECK_X(port,pin)
62 #define PORT_IRQ_EDGE_FALL(port,pin) PORT_IRQ_EDGE_FALL_X(port,pin)
63 #define PORT_IRQ_EDGE_RISE(port,pin) PORT_IRQ_EDGE_RISE_X(port,pin)
64 #define PORT_IRQ_FLAG_OFF(port,pin) PORT_IRQ_FLAG_OFF_X(port,pin)
65 /*---------------------------------------------------------------------------*/
66 /* Second Round of Macro Substitutions. Normally, you can stop reading here */
67 /*---------------------------------------------------------------------------*/
68 #define PORT_FUNC_GPIO_X(port,pin) do { P##port##SEL &= ~(1 << pin); } while(0)
69 #define PORT_FUNC_PER_X(port,pin) do { P##port##SEL |= 1 << pin; } while(0)
70 #define PORT0_ANALOG_IO_X(port,pin) do { APCFG |= 1 << pin; } while(0)
71 #define PORT0_DIGITAL_IO_X(port,pin) do { APCFG &= ~(1 << pin); } while(0)
72 #define PORT_SET_X(port,pin) do { P##port##_##pin = 1; } while(0)
73 #define PORT_CLEAR_X(port,pin) do { P##port##_##pin = 0; } while(0)
74 #define PORT_TOGGLE_X(port,pin) do { P##port##_##pin ^= 1; } while(0)
75 #define PORT_READ_X(port,pin) (P##port##_##pin)
76 #define PORT_WRITE_X(port,pin,v) do { P##port##_##pin = v;} while(0)
77 #define PORT_DIR_OUTPUT_X(port,pin) do { P##port##DIR |= 1 << pin; } while(0)
78 #define PORT_DIR_INPUT_X(port,pin) do { P##port##DIR &= ~(1 << pin); } while(0)
79 #define PORT_IRQ_ENABLE_X(port,pin) do { \
80  P##port##IEN |= 1 << pin; \
81  PORT##port##_IRQ_ENABLE(); \
82 } while(0)
83 #define PORT_IRQ_DISABLE_X(port,pin) do { \
84  P##port##IEN &= ~(1 << pin); \
85  PORT##port##_IRQ_DISABLE(); \
86 } while(0)
87 #define PORT_IRQ_ENABLED_X(port,pin) (P##port##IEN & (1 << pin))
88 #define PORT_IRQ_CHECK_X(port,pin) (P##port##IFG & (1 << pin))
89 #define PORT_IRQ_EDGE_FALL_X(port,pin) PORT##port##_IRQ_EDGE_FALL(pin)
90 #define PORT_IRQ_EDGE_RISE_X(port,pin) PORT##port##_IRQ_EDGE_RISE(pin)
91 #define PORT_IRQ_FLAG_OFF_X(port,pin) do { \
92  P##port##IFG &= ~(1 << pin); \
93  P##port##IF = 0; \
94 } while(0)
95 /*---------------------------------------------------------------------------*/
96 /* To handle SFR diversities
97  * - P0IE is in IEN1, which is bit-addressable,
98  * P1IE and P2IE are in IEN2, which is not bit-addressable
99  * - Edge detection (rising / falling) config is uniform for all pins in
100  * P0 and P2. For P1, low and high nibble bits are configured separately
101  * - Pullup/Pulldown/Tristate is quite different for each port
102  *
103  * You won't have to invoke these macros directly
104  */
105 #define PORT0_IRQ_ENABLE() do { P0IE = 1; } while(0)
106 #define PORT0_IRQ_DISABLE() do { P0IE = 0; } while(0)
107 #define PORT1_IRQ_ENABLE() PORT_IRQ_EN_X(1)
108 #define PORT1_IRQ_DISABLE() PORT_IRQ_DIS_X(1)
109 #define PORT2_IRQ_ENABLE() PORT_IRQ_EN_X(2)
110 #define PORT2_IRQ_DISABLE() PORT_IRQ_DIS_X(2)
111 
112 #define PORT_IRQ_EN_X(port) do { IEN2 |= IEN2_P##port##IE; } while(0)
113 #define PORT_IRQ_DIS_X(port) do { IEN2 &= ~IEN2_P##port##IE; } while(0)
114 /*---------------------------------------------------------------------------*/
115 #define PORT0_IRQ_EDGE_FALL(pin) PORT_IRQ_EDGE_F_X(0)
116 #define PORT0_IRQ_EDGE_RISE(pin) PORT_IRQ_EDGE_R_X(0)
117 #define PORT1_IRQ_EDGE_FALL(pin) PORT1_##pin##_IRQ_EDGE_F_X()
118 #define PORT1_IRQ_EDGE_RISE(pin) PORT1_##pin##_IRQ_EDGE_R_X()
119 #define PORT2_IRQ_EDGE_FALL(pin) PORT_IRQ_EDGE_F_X(2)
120 #define PORT2_IRQ_EDGE_RISE(pin) PORT_IRQ_EDGE_R_X(2)
121 
122 /* Ports 0 & 2 */
123 #define PORT_IRQ_EDGE_F_X(port) do { PICTL |= PICTL_P##port##ICON; } while(0)
124 #define PORT_IRQ_EDGE_R_X(port) do { PICTL &= ~PICTL_P##port##ICON; } while(0)
125 /* Port 1 - High Nibble */
126 #define PORT1_7_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONH; } while(0)
127 #define PORT1_7_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONH; } while(0)
128 #define PORT1_6_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONH; } while(0)
129 #define PORT1_6_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONH; } while(0)
130 #define PORT1_5_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONH; } while(0)
131 #define PORT1_5_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONH; } while(0)
132 #define PORT1_4_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONH; } while(0)
133 #define PORT1_4_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONH; } while(0)
134 /* Port 1 - Low Nibble */
135 #define PORT1_3_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONL; } while(0)
136 #define PORT1_3_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONL; } while(0)
137 #define PORT1_2_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONL; } while(0)
138 #define PORT1_2_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONL; } while(0)
139 #define PORT1_1_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONL; } while(0)
140 #define PORT1_1_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONL; } while(0)
141 #define PORT1_0_IRQ_EDGE_F_X() do { PICTL |= PICTL_P1ICONL; } while(0)
142 #define PORT1_0_IRQ_EDGE_R_X() do { PICTL &= ~PICTL_P1ICONL; } while(0)
143 /*---------------------------------------------------------------------------*/
144 
145 #endif /* PORT_H_ */
Definitions for TI/Chipcon cc2530, cc2531 and cc2533 SFR registers.
Header file with definitions of bit masks for some cc2530 SFRs