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cpu.c
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1 /*
2  * Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  *
14  * 3. Neither the name of the copyright holder nor the names of its
15  * contributors may be used to endorse or promote products derived
16  * from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29  * OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 /**
32  * \addtogroup cc2538-cpu
33  * @{
34  *
35  * \file
36  * Implementations of interrupt control on the cc2538 Cortex-M3 micro
37  */
38 /*---------------------------------------------------------------------------*/
39 unsigned long __attribute__((naked))
40 cpu_cpsie(void)
41 {
42  unsigned long ret;
43 
44  /* Read PRIMASK and enable interrupts */
45  __asm(" mrs r0, PRIMASK\n"
46  " cpsie i\n"
47  " bx lr\n"
48  : "=r" (ret));
49 
50  /* The inline asm returns, we never reach here.
51  * We add a return statement to keep the compiler happy */
52  return ret;
53 }
54 /*---------------------------------------------------------------------------*/
55 unsigned long __attribute__((naked))
56 cpu_cpsid(void)
57 {
58  unsigned long ret;
59 
60  /* Read PRIMASK and disable interrupts */
61  __asm(" mrs r0, PRIMASK\n"
62  " cpsid i\n"
63  " bx lr\n"
64  : "=r" (ret));
65 
66  /* The inline asm returns, we never reach here.
67  * We add a return statement to keep the compiler happy */
68  return ret;
69 }
70 /*---------------------------------------------------------------------------*/
71 
72 /** @} */
void __attribute__((interrupt))
This ISR handles most of the business interacting with the 1-wire bus.
Definition: onewire.c:174
unsigned long cpu_cpsie(void)
Enables all CPU interrupts.
unsigned long cpu_cpsid(void)
Disables all CPU interrupts.