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ioc.h
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1 /*
2  * Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  *
14  * 3. Neither the name of the copyright holder nor the names of its
15  * contributors may be used to endorse or promote products derived
16  * from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29  * OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 /**
32  * \addtogroup cc2538
33  * @{
34  *
35  * \defgroup cc2538-ioc cc2538 I/O Control
36  *
37  * cc2538 I/O Control Module
38  * @{
39  *
40  * \file
41  * Header file with declarations for the I/O Control module
42  */
43 #ifndef IOC_H_
44 #define IOC_H_
45 
46 #include <stdint.h>
47 /*---------------------------------------------------------------------------*/
48 /** \name IOC Signal Select Registers
49  * @{
50  */
51 #define IOC_PA0_SEL 0x400D4000
52 #define IOC_PA1_SEL 0x400D4004
53 #define IOC_PA2_SEL 0x400D4008
54 #define IOC_PA3_SEL 0x400D400C
55 #define IOC_PA4_SEL 0x400D4010
56 #define IOC_PA5_SEL 0x400D4014
57 #define IOC_PA6_SEL 0x400D4018
58 #define IOC_PA7_SEL 0x400D401C
59 #define IOC_PB0_SEL 0x400D4020
60 #define IOC_PB1_SEL 0x400D4024
61 #define IOC_PB2_SEL 0x400D4028
62 #define IOC_PB3_SEL 0x400D402C
63 #define IOC_PB4_SEL 0x400D4030
64 #define IOC_PB5_SEL 0x400D4034
65 #define IOC_PB6_SEL 0x400D4038
66 #define IOC_PB7_SEL 0x400D403C
67 #define IOC_PC0_SEL 0x400D4040
68 #define IOC_PC1_SEL 0x400D4044
69 #define IOC_PC2_SEL 0x400D4048
70 #define IOC_PC3_SEL 0x400D404C
71 #define IOC_PC4_SEL 0x400D4050
72 #define IOC_PC5_SEL 0x400D4054
73 #define IOC_PC6_SEL 0x400D4058
74 #define IOC_PC7_SEL 0x400D405C
75 #define IOC_PD0_SEL 0x400D4060
76 #define IOC_PD1_SEL 0x400D4064
77 #define IOC_PD2_SEL 0x400D4068
78 #define IOC_PD3_SEL 0x400D406C
79 #define IOC_PD4_SEL 0x400D4070
80 #define IOC_PD5_SEL 0x400D4074
81 #define IOC_PD6_SEL 0x400D4078
82 #define IOC_PD7_SEL 0x400D407C
83 /** @} */
84 /*---------------------------------------------------------------------------*/
85 /** \name IOC Override Configuration Registers
86  * @{
87  */
88 #define IOC_PA0_OVER 0x400D4080
89 #define IOC_PA1_OVER 0x400D4084
90 #define IOC_PA2_OVER 0x400D4088
91 #define IOC_PA3_OVER 0x400D408C
92 #define IOC_PA4_OVER 0x400D4090
93 #define IOC_PA5_OVER 0x400D4094
94 #define IOC_PA6_OVER 0x400D4098
95 #define IOC_PA7_OVER 0x400D409C
96 #define IOC_PB0_OVER 0x400D40A0
97 #define IOC_PB1_OVER 0x400D40A4
98 #define IOC_PB2_OVER 0x400D40A8
99 #define IOC_PB3_OVER 0x400D40AC
100 #define IOC_PB4_OVER 0x400D40B0
101 #define IOC_PB5_OVER 0x400D40B4
102 #define IOC_PB6_OVER 0x400D40B8
103 #define IOC_PB7_OVER 0x400D40BC
104 #define IOC_PC0_OVER 0x400D40C0
105 #define IOC_PC1_OVER 0x400D40C4
106 #define IOC_PC2_OVER 0x400D40C8
107 #define IOC_PC3_OVER 0x400D40CC
108 #define IOC_PC4_OVER 0x400D40D0
109 #define IOC_PC5_OVER 0x400D40D4
110 #define IOC_PC6_OVER 0x400D40D8
111 #define IOC_PC7_OVER 0x400D40DC
112 #define IOC_PD0_OVER 0x400D40E0
113 #define IOC_PD1_OVER 0x400D40E4
114 #define IOC_PD2_OVER 0x400D40E8
115 #define IOC_PD3_OVER 0x400D40EC
116 #define IOC_PD4_OVER 0x400D40F0
117 #define IOC_PD5_OVER 0x400D40F4
118 #define IOC_PD6_OVER 0x400D40F8
119 #define IOC_PD7_OVER 0x400D40FC
120 /** @} */
121 /*---------------------------------------------------------------------------*/
122 /** \name IOC Input Pin Select Registers
123  * @{
124  */
125 #define IOC_UARTRXD_UART0 0x400D4100 /**< UART0 RX */
126 #define IOC_UARTCTS_UART1 0x400D4104 /**< UART1 CTS */
127 #define IOC_UARTRXD_UART1 0x400D4108 /**< UART1 RX */
128 #define IOC_CLK_SSI_SSI0 0x400D410C /**< SSI0 Clock */
129 #define IOC_SSIRXD_SSI0 0x400D4110 /**< SSI0 RX */
130 #define IOC_SSIFSSIN_SSI0 0x400D4114 /**< SSI0 FSSIN */
131 #define IOC_CLK_SSIIN_SSI0 0x400D4118 /**< SSI0 Clock SSIIN */
132 #define IOC_CLK_SSI_SSI1 0x400D411C /**< SSI1 Clock */
133 #define IOC_SSIRXD_SSI1 0x400D4120 /**< SSI1 RX */
134 #define IOC_SSIFSSIN_SSI1 0x400D4124 /**< SSI1 FSSIN Select */
135 #define IOC_CLK_SSIIN_SSI1 0x400D4128 /**< SSI1 Clock SSIIN */
136 #define IOC_I2CMSSDA 0x400D412C /**< I2C SDA */
137 #define IOC_I2CMSSCL 0x400D4130 /**< I2C SCL */
138 #define IOC_GPT0OCP1 0x400D4134 /**< GPT0OCP1 */
139 #define IOC_GPT0OCP2 0x400D4138 /**< GPT0OCP2 */
140 #define IOC_GPT1OCP1 0x400D413C /**< GPT1OCP1 */
141 #define IOC_GPT1OCP2 0x400D4140 /**< GPT1OCP2 */
142 #define IOC_GPT2OCP1 0x400D4144 /**< GPT2OCP1 */
143 #define IOC_GPT2OCP2 0x400D4148 /**< GPT2OCP2 */
144 #define IOC_GPT3OCP1 0x400D414C /**< GPT3OCP1 */
145 #define IOC_GPT3OCP2 0x400D4150 /**< GPT3OCP2 */
146 /** @} */
147 /*---------------------------------------------------------------------------*/
148 /** \name I/O Control Register Bit Masks
149  * @{
150  */
151 #define IOC_OVR_MASK 0x0000000F /**< IOC_Pxn_OVER registers */
152 #define IOC_PXX_SEL_MASK 0x0000001F /**< IOC_Pxn_SEL registers */
153 #define IOC_INPUT_SEL_MASK 0x0000001F /**< All other IOC registers */
154 /** @} */
155 /*---------------------------------------------------------------------------*/
156 /** \name INPUT_SEL Values (For Pin Selection Registers)
157  * @{
158  */
159 #define IOC_INPUT_SEL_PA0 0x00000000
160 #define IOC_INPUT_SEL_PA1 0x00000001
161 #define IOC_INPUT_SEL_PA2 0x00000002
162 #define IOC_INPUT_SEL_PA3 0x00000003
163 #define IOC_INPUT_SEL_PA4 0x00000004
164 #define IOC_INPUT_SEL_PA5 0x00000005
165 #define IOC_INPUT_SEL_PA6 0x00000006
166 #define IOC_INPUT_SEL_PA7 0x00000007
167 #define IOC_INPUT_SEL_PB0 0x00000008
168 #define IOC_INPUT_SEL_PB1 0x00000009
169 #define IOC_INPUT_SEL_PB2 0x0000000A
170 #define IOC_INPUT_SEL_PB3 0x0000000B
171 #define IOC_INPUT_SEL_PB4 0x0000000C
172 #define IOC_INPUT_SEL_PB5 0x0000000D
173 #define IOC_INPUT_SEL_PB6 0x0000000E
174 #define IOC_INPUT_SEL_PB7 0x0000000F
175 #define IOC_INPUT_SEL_PC0 0x00000010
176 #define IOC_INPUT_SEL_PC1 0x00000011
177 #define IOC_INPUT_SEL_PC2 0x00000012
178 #define IOC_INPUT_SEL_PC3 0x00000013
179 #define IOC_INPUT_SEL_PC4 0x00000014
180 #define IOC_INPUT_SEL_PC5 0x00000015
181 #define IOC_INPUT_SEL_PC6 0x00000016
182 #define IOC_INPUT_SEL_PC7 0x00000017
183 #define IOC_INPUT_SEL_PD0 0x00000018
184 #define IOC_INPUT_SEL_PD1 0x00000019
185 #define IOC_INPUT_SEL_PD2 0x0000001A
186 #define IOC_INPUT_SEL_PD3 0x0000001B
187 #define IOC_INPUT_SEL_PD4 0x0000001C
188 #define IOC_INPUT_SEL_PD5 0x0000001D
189 #define IOC_INPUT_SEL_PD6 0x0000001E
190 #define IOC_INPUT_SEL_PD7 0x0000001F
191 /** @} */
192 /*---------------------------------------------------------------------------*/
193 /** \name Peripheral Signal Select Values (for IOC_Pxx_SEL registers)
194  * @{
195  */
196 #define IOC_PXX_SEL_UART0_TXD 0x00000000
197 #define IOC_PXX_SEL_UART1_RTS 0x00000001
198 #define IOC_PXX_SEL_UART1_TXD 0x00000002
199 #define IOC_PXX_SEL_SSI0_TXD 0x00000003
200 #define IOC_PXX_SEL_SSI0_CLKOUT 0x00000004
201 #define IOC_PXX_SEL_SSI0_FSSOUT 0x00000005
202 #define IOC_PXX_SEL_SSI0_STXSER_EN 0x00000006
203 #define IOC_PXX_SEL_SSI1_TXD 0x00000007
204 #define IOC_PXX_SEL_SSI1_CLKOUT 0x00000008
205 #define IOC_PXX_SEL_SSI1_FSSOUT 0x00000009
206 #define IOC_PXX_SEL_SSI1_STXSER_EN 0x0000000A
207 #define IOC_PXX_SEL_I2C_CMSSDA 0x0000000B
208 #define IOC_PXX_SEL_I2C_CMSSCL 0x0000000C
209 #define IOC_PXX_SEL_GPT0_ICP1 0x0000000D
210 #define IOC_PXX_SEL_GPT0_ICP2 0x0000000E
211 #define IOC_PXX_SEL_GPT1_ICP1 0x0000000F
212 #define IOC_PXX_SEL_GPT1_ICP2 0x00000010
213 #define IOC_PXX_SEL_GPT2_ICP1 0x00000011
214 #define IOC_PXX_SEL_GPT2_ICP2 0x00000012
215 #define IOC_PXX_SEL_GPT3_ICP1 0x00000013
216 #define IOC_PXX_SEL_GPT3_ICP2 0x00000014
217 /** @} */
218 /*---------------------------------------------------------------------------*/
219 /** \name Values for IOC_PXX_OVER
220  * @{
221  */
222 #define IOC_OVERRIDE_OE 0x00000008 /**< Output Enable */
223 #define IOC_OVERRIDE_PUE 0x00000004 /**< Pull Up Enable */
224 #define IOC_OVERRIDE_PDE 0x00000002 /**< Pull Down Enable */
225 #define IOC_OVERRIDE_ANA 0x00000001 /**< Analog Enable */
226 #define IOC_OVERRIDE_DIS 0x00000000 /**< Override Disabled */
227 /** @} */
228 
229 /*---------------------------------------------------------------------------*/
230 /** \name IOC Functions
231  * @{
232  */
233 /** \brief Initialise the IOC driver */
234 void ioc_init();
235 
236 /**
237  * \brief Set Port:Pin override function
238  * \param port The port as a number (PA: 0, PB: 1 etc)
239  * \param pin The pin as a number
240  * \param over The desired override configuration
241  *
242  * \e over can take the following values:
243  *
244  * - IOC_OVERRIDE_OE: Output
245  * - IOC_OVERRIDE_PUE: Pull-Up
246  * - IOC_OVERRIDE_PDE: Pull-Down
247  * - IOC_OVERRIDE_ANA: Analog
248  * - IOC_OVERRIDE_DIS: Disabled
249  */
250 void ioc_set_over(uint8_t port, uint8_t pin, uint8_t over);
251 
252 /**
253  * \brief Function select for Port:Pin
254  * \param port The port as a number (PA: 0, PB: 1 etc)
255  * \param pin The pin as a number
256  * \param sel The desired function
257  *
258  * The value of \e sel can be any of the IOC_PXX_SEL_xyz defines. For example
259  * IOC_PXX_SEL_UART0_TXD will set the port to act as UART0 TX
260  */
261 void ioc_set_sel(uint8_t port, uint8_t pin, uint8_t sel);
262 
263 /**
264  * \brief Generates an IOC_INPUT_SEL_PXn value from a port/pin number
265  * \param port The port as a number (PA: 0, PB: 1 etc)
266  * \param pin The pin as a number
267  * \return A value which can be written in the INPUT_SEL bits of various IOC
268  * registers
269  */
270 #define ioc_input_sel(port, pin) ((port << 3) | pin)
271 
272 /** @} */
273 #endif /* IOC_H_ */
274 
275 /**
276  * @}
277  * @}
278  */
ioc_set_over
void ioc_set_over(uint8_t port, uint8_t pin, uint8_t over)
Set Port:Pin override function.
Definition: ioc.c:54
ioc_set_sel
void ioc_set_sel(uint8_t port, uint8_t pin, uint8_t sel)
Function select for Port:Pin.
Definition: ioc.c:60
ioc_init
void ioc_init()
Initialise the IOC driver.
Definition: ioc.c:47
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