39 void default_vreg_init(
void) {
41 *CRM_SYS_CNTL = 0x00000018;
42 *CRM_VREG_CNTL = 0x00000f04;
43 for(i=0; i<0x161a8; i++) {
continue; }
45 *CRM_VREG_CNTL = 0x00000ff8;
48 void buck_init(
void) {
49 CRM->SYS_CNTLbits.PWR_SOURCE = 1;
50 CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 1;
51 CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 0;
52 CRM->VREG_CNTLbits.BUCK_EN = 1;
53 while(CRM->STATUSbits.VREG_BUCK_RDY == 0) {
continue; }
54 CRM->VREG_CNTLbits.VREG_1P5V_SEL = 3;
55 CRM->VREG_CNTLbits.VREG_1P5V_EN = 3;
56 CRM->VREG_CNTLbits.VREG_1P8V_EN = 1;
57 while(CRM->STATUSbits.VREG_1P5V_RDY == 0) {
continue; }
58 while(CRM->STATUSbits.VREG_1P8V_RDY == 0) {
continue; }
63 GPIO->FUNC_SEL.GPIO_63 = 3;
64 GPIO->PAD_PU_SEL.GPIO_63 = 0;
65 GPIO->FUNC_SEL.SS = 3;
66 GPIO->PAD_PU_SEL.SS = 1;
67 GPIO->FUNC_SEL.VREF2H = 3;
68 GPIO->PAD_PU_SEL.VREF2H = 1;
69 GPIO->FUNC_SEL.U1RTS = 3;
70 GPIO->PAD_PU_SEL.U1RTS = 1;