Contiki 3.x
uart.h
1 /*
2  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
3  * to the MC1322x project (http://mc1322x.devl.org)
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the Institute nor the names of its contributors
15  * may be used to endorse or promote products derived from this software
16  * without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * This file is part of libmc1322x: see http://mc1322x.devl.org
31  * for details.
32  *
33  *
34  */
35 
36 #ifndef UART_H
37 #define UART_H
38 
39 #include "contiki-conf.h"
40 #include <stdint.h>
41 
42 /* Timer registers are all 16-bit wide with 16-bit access only */
43 #define UART1_BASE (0x80005000)
44 #define UART2_BASE (0x8000B000)
45 
46 struct UART_struct {
47  union {
48  uint32_t CON;
49  struct UART_CON {
50  uint32_t TXE:1;
51  uint32_t RXE:1;
52  uint32_t PEN:1;
53  uint32_t EP:1;
54  uint32_t ST2:1;
55  uint32_t SB:1;
56  uint32_t CONTX:1;
57  uint32_t TXOENB:1;
58  uint32_t :2;
59  uint32_t XTIM:1;
60  uint32_t FCP:1;
61  uint32_t FCE:1;
62  uint32_t MTXR:1;
63  uint32_t MRXR:1;
64  uint32_t TST:1;
65  uint32_t :16;
66  } CONbits;
67  };
68  union {
69  uint32_t STAT;
70  struct UART_STAT {
71  uint32_t SE:1;
72  uint32_t PE:1;
73  uint32_t FE:1;
74  uint32_t TOE:1;
75  uint32_t ROE:1;
76  uint32_t RUE:1;
77  uint32_t RXRDY:1;
78  uint32_t TXRDY:1;
79  uint32_t :24;
80  } USTATbits;
81  };
82  union {
83  uint32_t DATA;
84  struct UART_DATA {
85  uint32_t DATA:8;
86  uint32_t :24;
87  } DATAbits;
88  };
89  union {
90  uint32_t RXCON;
91  struct UART_URXCON {
92  uint32_t LVL:6;
93  uint32_t :26;
94  } RXCONbits;
95  };
96  union {
97  uint32_t TXCON;
98  struct UART_TXCON {
99  uint32_t LVL:6;
100  uint32_t :26;
101  } TXCONbits;
102  };
103  union {
104  uint32_t CTS;
105  struct UART_CTS {
106  uint32_t LVL:5;
107  uint32_t :27;
108  } CTSbits;
109  };
110  union {
111  uint32_t BR;
112  struct UART_BR {
113  uint32_t MOD:16;
114  uint32_t INC:16;
115  } BRbits;
116  };
117 };
118 
119 static volatile struct UART_struct * const UART1 = (void *) (UART1_BASE);
120 static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE);
121 
122 /* Old uart definitions, for compatibility */
123 #ifndef REG_NO_COMPAT
124 
125 #define UCON (0)
126 /* UCON bits */
127 #define UCON_SAMP 10
128 #define UCON_SAMP_8X 0
129 #define UCON_SAMP_16X 1
130 
131 #define USTAT (0x04)
132 #define UDATA (0x08)
133 #define URXCON (0x0c)
134 #define UTXCON (0x10)
135 #define UCTS (0x14)
136 #define UBRCNT (0x18)
137 
138 #define UART1_UCON ((volatile uint32_t *) ( UART1_BASE + UCON ))
139 #define UART1_USTAT ((volatile uint32_t *) ( UART1_BASE + USTAT ))
140 #define UART1_UDATA ((volatile uint32_t *) ( UART1_BASE + UDATA ))
141 #define UART1_URXCON ((volatile uint32_t *) ( UART1_BASE + URXCON ))
142 #define UART1_UTXCON ((volatile uint32_t *) ( UART1_BASE + UTXCON ))
143 #define UART1_UCTS ((volatile uint32_t *) ( UART1_BASE + UCTS ))
144 #define UART1_UBRCNT ((volatile uint32_t *) ( UART1_BASE + UBRCNT ))
145 
146 #define UART2_UCON ((volatile uint32_t *) ( UART2_BASE + UCON ))
147 #define UART2_USTAT ((volatile uint32_t *) ( UART2_BASE + USTAT ))
148 #define UART2_UDATA ((volatile uint32_t *) ( UART2_BASE + UDATA ))
149 #define UART2_URXCON ((volatile uint32_t *) ( UART2_BASE + URXCON ))
150 #define UART2_UTXCON ((volatile uint32_t *) ( UART2_BASE + UTXCON ))
151 #define UART2_UCTS ((volatile uint32_t *) ( UART2_BASE + UCTS ))
152 #define UART2_UBRCNT ((volatile uint32_t *) ( UART2_BASE + UBRCNT ))
153 
154 #endif /* REG_NO_COMPAT */
155 
156 void uart_init(volatile struct UART_struct * uart, uint32_t baud);
157 void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud);
158 void uart_flowctl(volatile struct UART_struct * uart, uint8_t on);
159 
160 
161 /* The mc1322x has a 32 byte hardware FIFO for transmitted characters.
162  * Currently it is always filled from a larger RAM buffer. It would be
163  * possible to eliminate that overhead by filling directly from a chain
164  * of data buffer pointers, but printf's would be not so easy.
165  */
166 #ifndef UART1_CONF_TX_BUFFERSIZE
167 #define UART1_TX_BUFFERSIZE 1024
168 #else
169 #define UART1_TX_BUFFERSIZE UART1_CONF_TX_BUFFERSIZE
170 #endif
171 
172 extern volatile uint32_t u1_tx_head, u1_tx_tail;
173 void uart1_putc(char c);
174 
175 /* The mc1322x has a 32 byte hardware FIFO for received characters.
176  * If a larger rx buffersize is specified the FIFO will be extended into RAM.
177  * RAM transfers will occur on interrupt when the FIFO is nearly full.
178  * If a smaller buffersize is specified hardware flow control will be
179  * initiated at that FIFO level.
180  * Set to 32 for no flow control or RAM buffer.
181  */
182 
183 #ifndef UART1_CONF_RX_BUFFERSIZE
184 #define UART1_RX_BUFFERSIZE 128
185 #else
186 #define UART1_RX_BUFFERSIZE UART1_CONF_RX_BUFFERSIZE
187 #endif
188 
189 #if UART1_RX_BUFFERSIZE > 32
190 extern volatile uint32_t u1_rx_head, u1_rx_tail;
191 #define uart1_can_get() ((u1_rx_head!=u1_rx_tail) || (*UART1_URXCON > 0))
192 #else
193 #define uart1_can_get() (*UART1_URXCON > 0)
194 #endif
195 uint8_t uart1_getc(void);
196 
197 #ifndef UART2_CONF_TX_BUFFERSIZE
198 #define UART2_TX_BUFFERSIZE 1024
199 #else
200 #define UART2_TX_BUFFERSIZE UART1_CONF_TX_BUFFERSIZE
201 #endif
202 
203 extern volatile uint32_t u2_tx_head, u2_tx_tail;
204 void uart2_putc(char c);
205 
206 #ifndef UART2_CONF_RX_BUFFERSIZE
207 #define UART2_RX_BUFFERSIZE 128
208 #else
209 #define UART2_RX_BUFFERSIZE UART1_CONF_RX_BUFFERSIZE
210 #endif
211 #if UART2_RX_BUFFERSIZE > 32
212 extern volatile uint32_t u2_rx_head, u2_rx_tail;
213 #define uart2_can_get() ((u2_rx_head!=u2_rx_tail) || (*UART2_URXCON > 0))
214 #else
215 #define uart2_can_get() (*UART2_URXCON > 0)
216 #endif
217 uint8_t uart2_getc(void);
218 
219 #endif
220 
void uart_init(const unsigned int uart_num, uint32_t module_clk_hz, const uint32_t baud)
Initialize UART.
Definition: uart.c:154
#define UART2_BASE
Peripheral UART2 base address.
Definition: MK60D10.h:8669
#define UART1
Peripheral UART1 base pointer.
Definition: MK60D10.h:8667
#define UART1_BASE
Peripheral UART1 base address.
Definition: MK60D10.h:8665
#define UART2
Peripheral UART2 base pointer.
Definition: MK60D10.h:8671