60 #include "contiki-conf.h"
80 #define ATMEGA128RFA1 6
82 #if PLATFORM_TYPE == RCB_B
87 # define MOSIPIN (0x02)
88 # define MISOPIN (0x03)
89 # define SCKPIN (0x01)
91 # define RSTPIN (0x05)
93 # define IRQPIN (0x04)
95 # define SLPTRPIN (0x04)
97 #elif PLATFORM_TYPE == ZIGBIT
100 # define SSPIN (0x00)
102 # define MOSIPIN (0x02)
103 # define MISOPIN (0x03)
104 # define SCKPIN (0x01)
106 # define RSTPIN (0x07)
108 # define IRQPIN (0x05)
110 # define SLPTRPIN (0x04)
113 #elif PLATFORM_TYPE == RAVEN_D
116 # define SSPIN (0x04)
118 # define MOSIPIN (0x05)
119 # define MISOPIN (0x06)
120 # define SCKPIN (0x07)
122 # define RSTPIN (0x01)
124 # define IRQPIN (0x06)
126 # define SLPTRPIN (0x03)
128 #elif PLATFORM_TYPE == RAVENUSB_C
131 # define SSPIN (0x00)
133 # define MOSIPIN (0x02)
134 # define MISOPIN (0x03)
135 # define SCKPIN (0x01)
137 # define RSTPIN (0x05)
139 # define IRQPIN (0x04)
141 # define SLPTRPIN (0x04)
143 #elif PLATFORM_TYPE == ATMEGA128RFA1
145 # define SLPTRPORT TRXPR
148 #elif CONTIKI_TARGET_MULLE
165 #elif PLATFORM_TYPE == IRIS
168 # define SSPIN (0x00)
170 # define MOSIPIN (0x02)
171 # define MISOPIN (0x03)
172 # define SCKPIN (0x01)
174 # define RSTPIN (0x06)
176 # define IRQPIN (0x04)
178 # define SLPTRPIN (0x07)
181 #error "PLATFORM_TYPE undefined in hal.h"
187 #define SSPORT SPIPORT
191 #define SCKPORT SPIPORT
195 #define MOSIPORT SPIPORT
199 #define MISOPORT SPIPORT
214 #define CAT(x, y) x##y
215 #define DDR(x) CAT(DDR, x)
216 #define PORT(x) CAT(PORT, x)
217 #define PIN(x) CAT(PIN, x)
221 #if defined(CONTIKI_TARGET_MULLE)
222 #define CAT(x, y) x##y.BYTE
223 #define DDR(x) CAT(PD, x)
224 #define PORT(x) CAT(P, x)
225 #define PIN(x) CAT(P, x)
236 #if defined(__AVR_ATmega128RFA1__)
238 #define hal_set_rst_low( ) ( TRXPR &= ~( 1 << TRXRST ) )
239 #define hal_set_rst_high( ) ( TRXPR |= ( 1 << TRXRST ) )
240 #define hal_set_slptr_high( ) ( TRXPR |= ( 1 << SLPTR ) )
241 #define hal_set_slptr_low( ) ( TRXPR &= ~( 1 << SLPTR ) )
242 #define hal_get_slptr( ) ( TRXPR & ( 1 << SLPTR ) )
245 #define SLP_TR SLPTRPIN
246 #define DDR_SLP_TR DDR( SLPTRPORT )
247 #define PORT_SLP_TR PORT( SLPTRPORT )
248 #define PIN_SLP_TR PIN( SLPTRPORT )
249 #define hal_set_slptr_high( ) ( PORT_SLP_TR |= ( 1 << SLP_TR ) )
250 #define hal_set_slptr_low( ) ( PORT_SLP_TR &= ~( 1 << SLP_TR ) )
251 #define hal_get_slptr( ) ( PIN_SLP_TR & ( 1 << SLP_TR ) )
253 #define DDR_RST DDR( RSTPORT )
254 #define PORT_RST PORT( RSTPORT )
255 #define PIN_RST PIN( RSTPORT )
256 #define hal_set_rst_high( ) ( PORT_RST |= ( 1 << RST ) )
257 #define hal_set_rst_low( ) ( PORT_RST &= ~( 1 << RST ) )
258 #define hal_get_rst( ) ( ( PIN_RST & ( 1 << RST ) ) >> RST )
259 #define HAL_SS_PIN SSPIN
260 #define HAL_SCK_PIN SCKPIN
261 #define HAL_MOSI_PIN MOSIPIN
262 #define HAL_MISO_PIN MISOPIN
263 #define HAL_PORT_SPI PORT( SPIPORT )
264 #define HAL_PORT_SS PORT( SSPORT )
265 #define HAL_PORT_SCK PORT( SCKPORT )
266 #define HAL_PORT_MOSI PORT( MOSIPORT )
267 #define HAL_PORT_MISO PORT( MISOPORT )
268 #define HAL_DDR_SPI DDR( SPIPORT )
269 #define HAL_DDR_SS DDR( SSPORT )
270 #define HAL_DDR_SCK DDR( SCKPORT )
271 #define HAL_DDR_MOSI DDR( MOSIPORT )
272 #define HAL_DDR_MISO DDR( MISOPORT )
273 #define HAL_DD_SS SSPIN
274 #define HAL_DD_SCK SCKPIN
275 #define HAL_DD_MOSI MOSIPIN
276 #define HAL_DD_MISO MISOPIN
282 #define HAL_SS_HIGH( ) (HAL_PORT_SS |= ( 1 << HAL_SS_PIN ))
283 #define HAL_SS_LOW( ) (HAL_PORT_SS &= ~( 1 << HAL_SS_PIN ))
287 #if PLATFORM_TYPE == ZIGBIT
289 #define RADIO_VECT INT5_vect
290 #define HAL_ENABLE_RADIO_INTERRUPT( ) { ( EIMSK |= ( 1 << INT5 ) ) ; EICRB |= 0x0C ; PORTE &= ~(1<<PE5); DDRE &= ~(1<<DDE5); }
291 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( EIMSK &= ~( 1 << INT5 ) )
293 #define RADIO_VECT TIMER1_CAPT_vect
295 #define HAL_ENABLE_RADIO_INTERRUPT( ) { TCCR1B = ( 1 << ICES1 ) | ( 1 << CS10 ); TIFR1 |= (1 << ICF1); TIMSK1 |= ( 1 << ICIE1 ) ; }
296 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( TIMSK1 &= ~( 1 << ICIE1 ) )
299 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 |= ( 1 << TOIE1 ) )
300 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) )
303 #define HAL_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
307 #define HAL_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
311 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE |= 1 )
312 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE &= ~(1) )
314 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 1 )
315 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 0 )
318 #define HAL_ENTER_CRITICAL_REGION( ) MULLE_ENTER_CRITICAL_REGION( )
322 #define HAL_LEAVE_CRITICAL_REGION( ) MULLE_LEAVE_CRITICAL_REGION( )
329 #define hal_enable_trx_interrupt( ) HAL_ENABLE_RADIO_INTERRUPT( )
335 #define hal_disable_trx_interrupt( ) HAL_DISABLE_RADIO_INTERRUPT( )
342 #define HAL_BAT_LOW_MASK ( 0x80 )
343 #define HAL_TRX_UR_MASK ( 0x40 )
344 #define HAL_TRX_END_MASK ( 0x08 )
345 #define HAL_RX_START_MASK ( 0x04 )
346 #define HAL_PLL_UNLOCK_MASK ( 0x02 )
347 #define HAL_PLL_LOCK_MASK ( 0x01 )
349 #define HAL_MIN_FRAME_LENGTH ( 0x03 )
350 #define HAL_MAX_FRAME_LENGTH ( 0x7F )
370 #if defined(__AVR_ATmega128RFA1__)
372 #define hal_register_read(address) address
378 #define hal_register_write(address, value) address=value
394 void hal_sram_read( uint8_t address, uint8_t length, uint8_t *data );
395 void hal_sram_write( uint8_t address, uint8_t length, uint8_t *data );
397 #ifndef RF230_CONF_RX_BUFFERS
398 #define RF230_CONF_RX_BUFFERS 1
uint8_t hal_register_read(uint8_t address)
This function reads data from one of the radio transceiver's registers.
uint8_t hal_subregister_read(uint8_t address, uint8_t mask, uint8_t position)
This function reads the value of a specific subregister.
void hal_init(void)
This function initializes the Hardware Abstraction Layer.
This struct defines the rx data container.
void hal_subregister_write(uint8_t address, uint8_t mask, uint8_t position, uint8_t value)
This function writes a new value to one of the radio transceiver's subregisters.
void hal_sram_read(uint8_t address, uint8_t length, uint8_t *data)
Read SRAM.
void hal_frame_read(hal_rx_frame_t *rx_frame, rx_callback_t rx_callback)
This function will upload a frame from the radio transceiver's frame buffer.
void hal_sram_write(uint8_t address, uint8_t length, uint8_t *data)
Write SRAM.
void hal_frame_write(uint8_t *write_buffer, uint8_t length)
This function will download a frame to the radio transceiver's frame buffer.
#define HAL_MAX_FRAME_LENGTH
A frame should no more than 127 bytes.
void hal_register_write(uint8_t address, uint8_t value)
This function writes a new value to one of the radio transceiver's registers.