46 static uint32_t *interrupt_enable;
47 static uint32_t *interrupt_disable;
48 static uint32_t *interrupt_pend;
49 static uint32_t *interrupt_unpend;
54 interrupt_enable = (uint32_t *)
NVIC_EN0;
55 interrupt_disable = (uint32_t *)
NVIC_DIS0;
60 REG(
SCB_VTABLE) = (NVIC_CONF_VTABLE_BASE | NVIC_CONF_VTABLE_OFFSET);
67 interrupt_enable[intr >> 5] = 1 << (intr & 0x1F);
74 interrupt_disable[intr >> 5] = 1 << (intr & 0x1F);
84 interrupt_enable[intr >> 5] = 1 << (intr & 0x1F);
90 uint8_t rv = ((interrupt_enable[intr >> 5] & (1 << (intr & 0x1F)))
91 > NVIC_INTERRUPT_DISABLED);
102 interrupt_pend[intr >> 5] = 1 << (intr & 0x1F);
109 interrupt_unpend[intr >> 5] = 1 << (intr & 0x1F);
#define NVIC_DIS0
Interrupt 0-31 Clear Enable.
void nvic_interrupt_pend(uint32_t intr)
Sets intr to pending.
Header file for the ARM Nested Vectored Interrupt Controller.
void nvic_interrupt_disable(uint32_t intr)
Disables interrupt intr.
Header file for the System Control Block (SCB)
void nvic_init()
Initialises the NVIC driver.
#define SCB_VTABLE
Vector Table Offset.
void nvic_interrupt_enable(uint32_t intr)
Enables interrupt intr.
Header file with register manipulation macro definitions.
void nvic_interrupt_unpend(uint32_t intr)
Sets intr to no longer pending.
#define NVIC_UNPEND0
Interrupt 0-31 Clear Pending.
#define NVIC_EN0
Interrupt 0-31 Set Enable.
#define NVIC_PEND0
Interrupt 0-31 Set Pending.
uint8_t nvic_interrupt_en_save(uint32_t intr)
Checks the interrupt enabled status for intr.
void nvic_interrupt_en_restore(uint32_t intr, uint8_t v)
Enables interrupt intr if v > 0.