Contiki 3.x
startup-gcc.c
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1 /*
2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  *
16  * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 /**
33  * \addtogroup cc2538
34  * @{
35  *
36  * \file
37  * Startup code for the cc2538dk platform, to be used when building with gcc
38  */
39 #include "contiki.h"
40 #include "reg.h"
41 #include "flash-cca.h"
42 #include "sys-ctrl.h"
43 #include "uart.h"
44 
45 #include <stdint.h>
46 /*---------------------------------------------------------------------------*/
47 extern int main(void);
48 /*---------------------------------------------------------------------------*/
49 /* System handlers provided here */
50 void reset_handler(void);
51 void nmi_handler(void);
52 void default_handler(void);
53 
54 /* System Handler and ISR prototypes implemented elsewhere */
55 void clock_isr(void); /* SysTick Handler */
56 void gpio_port_a_isr(void);
57 void gpio_port_b_isr(void);
58 void gpio_port_c_isr(void);
59 void gpio_port_d_isr(void);
60 void rtimer_isr(void);
61 void cc2538_rf_rx_tx_isr(void);
62 void cc2538_rf_err_isr(void);
63 void udma_isr(void);
64 void udma_err_isr(void);
65 
66 /* Boot Loader Backdoor selection */
67 #if FLASH_CCA_CONF_BOOTLDR_BACKDOOR
68 /* Backdoor enabled */
69 
70 #if FLASH_CCA_CONF_BOOTLDR_BACKDOOR_ACTIVE_HIGH
71 #define FLASH_CCA_BOOTLDR_CFG_ACTIVE_LEVEL FLASH_CCA_BOOTLDR_CFG_ACTIVE_HIGH
72 #else
73 #define FLASH_CCA_BOOTLDR_CFG_ACTIVE_LEVEL 0
74 #endif
75 
76 #if ( (FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN < 0) || (FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN > 7) )
77 #error Invalid boot loader backdoor pin. Please set FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN between 0 and 7 (indicating PA0 - PA7).
78 #endif
79 
80 #define FLASH_CCA_BOOTLDR_CFG ( FLASH_CCA_BOOTLDR_CFG_ENABLE \
81  | FLASH_CCA_BOOTLDR_CFG_ACTIVE_LEVEL \
82  | (FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN << FLASH_CCA_BOOTLDR_CFG_PORT_A_PIN_S) )
83 #else
84 #define FLASH_CCA_BOOTLDR_CFG FLASH_CCA_BOOTLDR_CFG_DISABLE
85 #endif
86 
87 /* Link in the USB ISR only if USB is enabled */
88 #if USB_SERIAL_CONF_ENABLE
89 void usb_isr(void);
90 #else
91 #define usb_isr default_handler
92 #endif
93 
94 /* Likewise for the UART[01] ISRs */
95 #if UART_CONF_ENABLE
96 void uart0_isr(void);
97 void uart1_isr(void);
98 #else /* UART_CONF_ENABLE */
99 #define uart0_isr default_handler
100 #define uart1_isr default_handler
101 #endif /* UART_CONF_ENABLE */
102 /*---------------------------------------------------------------------------*/
103 /* Allocate stack space */
104 static unsigned long stack[512];
105 /*---------------------------------------------------------------------------*/
106 /* Linker construct indicating .text section location */
107 extern uint8_t _text[0];
108 /*---------------------------------------------------------------------------*/
109 __attribute__ ((section(".flashcca"), used))
110 const flash_cca_lock_page_t __cca = {
111  FLASH_CCA_BOOTLDR_CFG, /* Boot loader backdoor configuration */
112  FLASH_CCA_IMAGE_VALID, /* Image valid */
113  &_text, /* Vector table located at the start of .text */
114  /* Unlock all pages and debug */
115  { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
116  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
117  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
118  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
119 };
120 /*---------------------------------------------------------------------------*/
121 __attribute__ ((section(".vectors"), used))
122 void(*const vectors[])(void) =
123 {
124  (void (*)(void))((unsigned long)stack + sizeof(stack)), /* Stack pointer */
125  reset_handler, /* Reset handler */
126  nmi_handler, /* The NMI handler */
127  default_handler, /* The hard fault handler */
128  default_handler, /* 4 The MPU fault handler */
129  default_handler, /* 5 The bus fault handler */
130  default_handler, /* 6 The usage fault handler */
131  0, /* 7 Reserved */
132  0, /* 8 Reserved */
133  0, /* 9 Reserved */
134  0, /* 10 Reserved */
135  default_handler, /* 11 SVCall handler */
136  default_handler, /* 12 Debug monitor handler */
137  0, /* 13 Reserved */
138  default_handler, /* 14 The PendSV handler */
139  clock_isr, /* 15 The SysTick handler */
140  gpio_port_a_isr, /* 16 GPIO Port A */
141  gpio_port_b_isr, /* 17 GPIO Port B */
142  gpio_port_c_isr, /* 18 GPIO Port C */
143  gpio_port_d_isr, /* 19 GPIO Port D */
144  0, /* 20 none */
145  uart0_isr, /* 21 UART0 Rx and Tx */
146  uart1_isr, /* 22 UART1 Rx and Tx */
147  default_handler, /* 23 SSI0 Rx and Tx */
148  default_handler, /* 24 I2C Master and Slave */
149  0, /* 25 Reserved */
150  0, /* 26 Reserved */
151  0, /* 27 Reserved */
152  0, /* 28 Reserved */
153  0, /* 29 Reserved */
154  default_handler, /* 30 ADC Sequence 0 */
155  0, /* 31 Reserved */
156  0, /* 32 Reserved */
157  0, /* 33 Reserved */
158  default_handler, /* 34 Watchdog timer, timer 0 */
159  default_handler, /* 35 Timer 0 subtimer A */
160  default_handler, /* 36 Timer 0 subtimer B */
161  default_handler, /* 37 Timer 1 subtimer A */
162  default_handler, /* 38 Timer 1 subtimer B */
163  default_handler, /* 39 Timer 2 subtimer A */
164  default_handler, /* 40 Timer 2 subtimer B */
165  default_handler, /* 41 Analog Comparator 0 */
166  default_handler, /* 42 RFCore Rx/Tx (Alternate) */
167  default_handler, /* 43 RFCore Error (Alternate) */
168  default_handler, /* 44 System Control */
169  default_handler, /* 45 FLASH Control */
170  default_handler, /* 46 AES (Alternate) */
171  default_handler, /* 47 PKA (Alternate) */
172  default_handler, /* 48 SM Timer (Alternate) */
173  default_handler, /* 49 MacTimer (Alternate) */
174  default_handler, /* 50 SSI1 Rx and Tx */
175  default_handler, /* 51 Timer 3 subtimer A */
176  default_handler, /* 52 Timer 3 subtimer B */
177  0, /* 53 Reserved */
178  0, /* 54 Reserved */
179  0, /* 55 Reserved */
180  0, /* 56 Reserved */
181  0, /* 57 Reserved */
182  0, /* 58 Reserved */
183  0, /* 59 Reserved */
184  0, /* 60 Reserved */
185  0, /* 61 Reserved */
186  udma_isr, /* 62 uDMA */
187  udma_err_isr, /* 63 uDMA Error */
188  0, /* 64 64-155 are not in use */
189  0, /* 65 */
190  0, /* 66 */
191  0, /* 67 */
192  0, /* 68 */
193  0, /* 69 */
194  0, /* 70 */
195  0, /* 71 */
196  0, /* 72 */
197  0, /* 73 */
198  0, /* 74 */
199  0, /* 75 */
200  0, /* 76 */
201  0, /* 77 */
202  0, /* 78 */
203  0, /* 79 */
204  0, /* 80 */
205  0, /* 81 */
206  0, /* 82 */
207  0, /* 83 */
208  0, /* 84 */
209  0, /* 85 */
210  0, /* 86 */
211  0, /* 87 */
212  0, /* 88 */
213  0, /* 89 */
214  0, /* 90 */
215  0, /* 91 */
216  0, /* 92 */
217  0, /* 93 */
218  0, /* 94 */
219  0, /* 95 */
220  0, /* 96 */
221  0, /* 97 */
222  0, /* 98 */
223  0, /* 99 */
224  0, /* 100 */
225  0, /* 101 */
226  0, /* 102 */
227  0, /* 103 */
228  0, /* 104 */
229  0, /* 105 */
230  0, /* 106 */
231  0, /* 107 */
232  0, /* 108 */
233  0, /* 109 */
234  0, /* 110 */
235  0, /* 111 */
236  0, /* 112 */
237  0, /* 113 */
238  0, /* 114 */
239  0, /* 115 */
240  0, /* 116 */
241  0, /* 117 */
242  0, /* 118 */
243  0, /* 119 */
244  0, /* 120 */
245  0, /* 121 */
246  0, /* 122 */
247  0, /* 123 */
248  0, /* 124 */
249  0, /* 125 */
250  0, /* 126 */
251  0, /* 127 */
252  0, /* 128 */
253  0, /* 129 */
254  0, /* 130 */
255  0, /* 131 */
256  0, /* 132 */
257  0, /* 133 */
258  0, /* 134 */
259  0, /* 135 */
260  0, /* 136 */
261  0, /* 137 */
262  0, /* 138 */
263  0, /* 139 */
264  0, /* 140 */
265  0, /* 141 */
266  0, /* 142 */
267  0, /* 143 */
268  0, /* 144 */
269  0, /* 145 */
270  0, /* 146 */
271  0, /* 147 */
272  0, /* 148 */
273  0, /* 149 */
274  0, /* 150 */
275  0, /* 151 */
276  0, /* 152 */
277  0, /* 153 */
278  0, /* 154 */
279  0, /* 155 */
280  usb_isr, /* 156 USB */
281  cc2538_rf_rx_tx_isr, /* 157 RFCORE RX/TX */
282  cc2538_rf_err_isr, /* 158 RFCORE Error */
283  default_handler, /* 159 AES */
284  default_handler, /* 160 PKA */
285  rtimer_isr, /* 161 SM Timer */
286  default_handler, /* 162 MACTimer */
287 };
288 /*---------------------------------------------------------------------------*/
289 /* Linker constructs indicating .data and .bss segment locations */
290 extern unsigned long _etext;
291 extern unsigned long _data;
292 extern unsigned long _edata;
293 extern unsigned long _bss;
294 extern unsigned long _ebss;
295 /*---------------------------------------------------------------------------*/
296 /* Weak interrupt handlers. */
297 void
298 nmi_handler(void)
299 {
300  reset_handler();
301  while(1);
302 }
303 /*---------------------------------------------------------------------------*/
304 void
305 default_handler(void)
306 {
307  while(1);
308 }
309 /*---------------------------------------------------------------------------*/
310 void
311 reset_handler(void)
312 {
313  unsigned long *pul_src, *pul_dst;
314 
315  REG(SYS_CTRL_EMUOVR) = 0xFF;
316 
317  /* Copy the data segment initializers from flash to SRAM. */
318  pul_src = &_etext;
319 
320  for(pul_dst = &_data; pul_dst < &_edata;) {
321  *pul_dst++ = *pul_src++;
322  }
323 
324  /* Zero-fill the bss segment. */
325  __asm(" ldr r0, =_bss\n"
326  " ldr r1, =_ebss\n"
327  " mov r2, #0\n"
328  " .thumb_func\n"
329  "zero_loop:\n"
330  " cmp r0, r1\n"
331  " it lt\n"
332  " strlt r2, [r0], #4\n" " blt zero_loop");
333 
334  /* call the application's entry point. */
335  main();
336 
337  /* End here if main () returns */
338  while(1);
339 }
340 /*---------------------------------------------------------------------------*/
341 
342 /** @} */
void gpio_port_d_isr()
Interrupt service routine for Port D.
Definition: gpio.c:132
void rtimer_isr()
The rtimer ISR.
Definition: rtimer-arch.c:137
Header file for the flash lock bit page and CCA definitions.
void __attribute__((interrupt))
This ISR handles most of the business interacting with the 1-wire bus.
Definition: onewire.c:174
void gpio_port_b_isr()
Interrupt service routine for Port B.
Definition: gpio.c:100
void cc2538_rf_rx_tx_isr(void)
The cc2538 RF RX/TX ISR.
Definition: cc2538-rf.c:972
int main(void)
This is main...
Definition: ethconfig.c:49
Header file with register manipulation macro definitions.
Header file for the cc2538 System Control driver.
#define SYS_CTRL_EMUOVR
Emulator override.
Definition: sys-ctrl.h:94
#define FLASH_CCA_IMAGE_VALID
Indicates valid image in flash.
Definition: flash-cca.h:66
void gpio_port_c_isr()
Interrupt service routine for Port C.
Definition: gpio.c:116
void cc2538_rf_err_isr(void)
The cc2538 RF Error ISR.
Definition: cc2538-rf.c:1001
void clock_isr(void)
The clock Interrupt Service Routine.
Definition: clock.c:238
void gpio_port_a_isr()
Interrupt service routine for Port A.
Definition: gpio.c:84