ADUCRF101

Modules
	Configuration_of_CMSIS
	Device_Peripheral_Registers

Enumerations
enum	IRQn_Type {   Reset_IRQn = -15, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12,   BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4,   PendSV_IRQn = -2, SysTick_IRQn = -1, WUT_IRQn = 0, EINT0_IRQn = 1,   EINT1_IRQn = 2, EINT2_IRQn = 3, EINT3_IRQn = 4, EINT4_IRQn = 5,   EINT5_IRQn = 6, EINT6_IRQn = 7, EINT7_IRQn = 8, EINT8_IRQn = 9,   UHFTRX_IRQn = 9, WDT_IRQn = 10, TIMER0_IRQn = 12, TIMER1_IRQn = 13,   ADC0_IRQn = 14, FLASH_IRQn = 15, UART_IRQn = 16, SPI0_IRQn = 17,   SPI1_IRQn = 18, I2CS_IRQn = 19, I2CM_IRQn = 20, DMA_ERR_IRQn = 23,   DMA_SPI1_TX_IRQn = 24, DMA_SPI1_RX_IRQn = 25, DMA_UART_TX_IRQn = 26, DMA_UART_RX_IRQn = 27,   DMA_I2CS_TX_IRQn = 28, DMA_I2CS_RX_IRQn = 29, DMA_I2CM_TX_IRQn = 30, DMA_I2CM_RX_IRQn = 31,   DMA_ADC0_IRQn = 35, DMA_SPI0_TX_IRQn = 36, DMA_SPI0_RX_IRQn = 37, PWM_TRIP_IRQn = 38,   PWM_PAIR0_IRQn = 39, PWM_PAIR1_IRQn = 40, PWM_PAIR2_IRQn = 41, PWM_PAIR3_IRQn = 42 }

Detailed Description

Enumeration Type Documentation

enum IRQn_Type

Enumerator
Reset_IRQn	1 Reset Vector, invoked on Power up and warm reset
NonMaskableInt_IRQn	2 Non maskable Interrupt, cannot be stopped or preempted
HardFault_IRQn	3 Hard Fault, all classes of Fault
MemoryManagement_IRQn	4 Memory Management, MPU mismatch, including Access Violation and No Match
BusFault_IRQn	5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory related Fault
UsageFault_IRQn	6 Usage Fault, i.e. Undef Instruction, Illegal State Transition
SVCall_IRQn	11 System Service Call via SVC instruction
DebugMonitor_IRQn	12 Debug Monitor
PendSV_IRQn	14 Pendable request for system service
SysTick_IRQn	15 System Tick Timer
WUT_IRQn	0 WUT
EINT0_IRQn	1 EINT0
EINT1_IRQn	2 EINT1
EINT2_IRQn	3 EINT2
EINT3_IRQn	4 EINT3
EINT4_IRQn	5 EINT4
EINT5_IRQn	6 EINT5
EINT6_IRQn	7 EINT6
EINT7_IRQn	8 EINT7
EINT8_IRQn	9 EINT8
UHFTRX_IRQn	9 UHFTRX
WDT_IRQn	10 WDT
TIMER0_IRQn	12 TIMER0
TIMER1_IRQn	13 TIMER1
ADC0_IRQn	14 ADC0
FLASH_IRQn	15 FLASH
UART_IRQn	16 UART
SPI0_IRQn	17 SPI0
SPI1_IRQn	18 SPI1
I2CS_IRQn	19 I2CS
I2CM_IRQn	20 I2CM
DMA_ERR_IRQn	23 DMA_ERR
DMA_SPI1_TX_IRQn	24 DMA_SPI1_TX
DMA_SPI1_RX_IRQn	25 DMA_SPI1_RX
DMA_UART_TX_IRQn	26 DMA_UART_TX
DMA_UART_RX_IRQn	27 DMA_UART_RX
DMA_I2CS_TX_IRQn	28 DMA_I2CS_TX
DMA_I2CS_RX_IRQn	29 DMA_I2CS_RX
DMA_I2CM_TX_IRQn	30 DMA_I2CM_TX
DMA_I2CM_RX_IRQn	31 DMA_I2CM_RX
DMA_ADC0_IRQn	35 DMA_ADC0
DMA_SPI0_TX_IRQn	36 DMA_SPI0_TX
DMA_SPI0_RX_IRQn	37 DMA_SPI0_RX
PWM_TRIP_IRQn	38 PWM_TRIP
PWM_PAIR0_IRQn	39 PWM_PAIR0
PWM_PAIR1_IRQn	40 PWM_PAIR1
PWM_PAIR2_IRQn	41 PWM_PAIR2
PWM_PAIR3_IRQn	42 PWM_PAIR3

Definition at line 69 of file ADuCRF101.h.