ADC_Type Struct Reference

ADC - Register Layout Typedef. More...

#include <cpu/arm/k60/include/MK60D10.h>

Data Fields
__IO uint32_t	SC1 [2]
	ADC Status and Control Registers 1, array offset: 0x0, array step: 0x4. More...
__IO uint32_t	CFG1
	ADC Configuration Register 1, offset: 0x8. More...
__IO uint32_t	CFG2
	ADC Configuration Register 2, offset: 0xC. More...
__I uint32_t	R [2]
	ADC Data Result Register, array offset: 0x10, array step: 0x4. More...
__IO uint32_t	CV1
	Compare Value Registers, offset: 0x18. More...
__IO uint32_t	CV2
	Compare Value Registers, offset: 0x1C. More...
__IO uint32_t	SC2
	Status and Control Register 2, offset: 0x20. More...
__IO uint32_t	SC3
	Status and Control Register 3, offset: 0x24. More...
__IO uint32_t	OFS
	ADC Offset Correction Register, offset: 0x28. More...
__IO uint32_t	PG
	ADC Plus-Side Gain Register, offset: 0x2C. More...
__IO uint32_t	MG
	ADC Minus-Side Gain Register, offset: 0x30. More...
__IO uint32_t	CLPD
	ADC Plus-Side General Calibration Value Register, offset: 0x34. More...
__IO uint32_t	CLPS
	ADC Plus-Side General Calibration Value Register, offset: 0x38. More...
__IO uint32_t	CLP4
	ADC Plus-Side General Calibration Value Register, offset: 0x3C. More...
__IO uint32_t	CLP3
	ADC Plus-Side General Calibration Value Register, offset: 0x40. More...
__IO uint32_t	CLP2
	ADC Plus-Side General Calibration Value Register, offset: 0x44. More...
__IO uint32_t	CLP1
	ADC Plus-Side General Calibration Value Register, offset: 0x48. More...
__IO uint32_t	CLP0
	ADC Plus-Side General Calibration Value Register, offset: 0x4C. More...
__IO uint32_t	PGA
	ADC PGA Register, offset: 0x50. More...
__IO uint32_t	CLMD
	ADC Minus-Side General Calibration Value Register, offset: 0x54. More...
__IO uint32_t	CLMS
	ADC Minus-Side General Calibration Value Register, offset: 0x58. More...
__IO uint32_t	CLM4
	ADC Minus-Side General Calibration Value Register, offset: 0x5C. More...
__IO uint32_t	CLM3
	ADC Minus-Side General Calibration Value Register, offset: 0x60. More...
__IO uint32_t	CLM2
	ADC Minus-Side General Calibration Value Register, offset: 0x64. More...
__IO uint32_t	CLM1
	ADC Minus-Side General Calibration Value Register, offset: 0x68. More...
__IO uint32_t	CLM0
	ADC Minus-Side General Calibration Value Register, offset: 0x6C. More...

Detailed Description

ADC - Register Layout Typedef.

Definition at line 266 of file MK60D10.h.

Field Documentation

__IO uint32_t ADC_Type::CFG1

ADC Configuration Register 1, offset: 0x8.

ADC configuration register 1, offset: 0x8.

Definition at line 268 of file MK60D10.h.

__IO uint32_t ADC_Type::CFG2

ADC Configuration Register 2, offset: 0xC.

Configuration register 2, offset: 0xC.

Definition at line 269 of file MK60D10.h.

__IO uint32_t ADC_Type::CLM0

ADC Minus-Side General Calibration Value Register, offset: 0x6C.

ADC minus-side general calibration value register, offset: 0x6C.

Definition at line 292 of file MK60D10.h.

__IO uint32_t ADC_Type::CLM1

ADC Minus-Side General Calibration Value Register, offset: 0x68.

ADC minus-side general calibration value register, offset: 0x68.

Definition at line 291 of file MK60D10.h.

__IO uint32_t ADC_Type::CLM2

ADC Minus-Side General Calibration Value Register, offset: 0x64.

ADC minus-side general calibration value register, offset: 0x64.

Definition at line 290 of file MK60D10.h.

__IO uint32_t ADC_Type::CLM3

ADC Minus-Side General Calibration Value Register, offset: 0x60.

ADC minus-side general calibration value register, offset: 0x60.

Definition at line 289 of file MK60D10.h.

__IO uint32_t ADC_Type::CLM4

ADC Minus-Side General Calibration Value Register, offset: 0x5C.

ADC minus-side general calibration value register, offset: 0x5C.

Definition at line 288 of file MK60D10.h.

__IO uint32_t ADC_Type::CLMD

ADC Minus-Side General Calibration Value Register, offset: 0x54.

ADC minus-side general calibration value register, offset: 0x54.

Definition at line 286 of file MK60D10.h.

__IO uint32_t ADC_Type::CLMS

ADC Minus-Side General Calibration Value Register, offset: 0x58.

ADC minus-side general calibration value register, offset: 0x58.

Definition at line 287 of file MK60D10.h.

__IO uint32_t ADC_Type::CLP0

ADC Plus-Side General Calibration Value Register, offset: 0x4C.

ADC plus-side general calibration value register, offset: 0x4C.

Definition at line 284 of file MK60D10.h.

__IO uint32_t ADC_Type::CLP1

ADC Plus-Side General Calibration Value Register, offset: 0x48.

ADC plus-side general calibration value register, offset: 0x48.

Definition at line 283 of file MK60D10.h.

__IO uint32_t ADC_Type::CLP2

ADC Plus-Side General Calibration Value Register, offset: 0x44.

ADC plus-side general calibration value register, offset: 0x44.

Definition at line 282 of file MK60D10.h.

__IO uint32_t ADC_Type::CLP3

ADC Plus-Side General Calibration Value Register, offset: 0x40.

ADC plus-side general calibration value register, offset: 0x40.

Definition at line 281 of file MK60D10.h.

__IO uint32_t ADC_Type::CLP4

ADC Plus-Side General Calibration Value Register, offset: 0x3C.

ADC plus-side general calibration value register, offset: 0x3C.

Definition at line 280 of file MK60D10.h.

__IO uint32_t ADC_Type::CLPD

ADC Plus-Side General Calibration Value Register, offset: 0x34.

ADC plus-side general calibration value register, offset: 0x34.

Definition at line 278 of file MK60D10.h.

__IO uint32_t ADC_Type::CLPS

ADC Plus-Side General Calibration Value Register, offset: 0x38.

ADC plus-side general calibration value register, offset: 0x38.

Definition at line 279 of file MK60D10.h.

__IO uint32_t ADC_Type::CV1

Compare Value Registers, offset: 0x18.

Compare value registers, offset: 0x18.

Definition at line 271 of file MK60D10.h.

__IO uint32_t ADC_Type::CV2

Compare Value Registers, offset: 0x1C.

Compare value registers, offset: 0x1C.

Definition at line 272 of file MK60D10.h.

__IO uint32_t ADC_Type::MG

ADC Minus-Side Gain Register, offset: 0x30.

ADC minus-side gain register, offset: 0x30.

Definition at line 277 of file MK60D10.h.

__IO uint32_t ADC_Type::OFS

ADC Offset Correction Register, offset: 0x28.

ADC offset correction register, offset: 0x28.

Definition at line 275 of file MK60D10.h.

__IO uint32_t ADC_Type::PG

ADC Plus-Side Gain Register, offset: 0x2C.

ADC plus-side gain register, offset: 0x2C.

Definition at line 276 of file MK60D10.h.

__IO uint32_t ADC_Type::PGA

ADC PGA Register, offset: 0x50.

ADC PGA register, offset: 0x50.

Definition at line 285 of file MK60D10.h.

__I uint32_t ADC_Type::R

ADC Data Result Register, array offset: 0x10, array step: 0x4.

ADC data result register, array offset: 0x10, array step: 0x4.

Definition at line 270 of file MK60D10.h.

__IO uint32_t ADC_Type::SC1

ADC Status and Control Registers 1, array offset: 0x0, array step: 0x4.

ADC status and control registers 1, array offset: 0x0, array step: 0x4.

Definition at line 267 of file MK60D10.h.

__IO uint32_t ADC_Type::SC2

Status and Control Register 2, offset: 0x20.

Status and control register 2, offset: 0x20.

Definition at line 273 of file MK60D10.h.

__IO uint32_t ADC_Type::SC3

Status and Control Register 3, offset: 0x24.

Status and control register 3, offset: 0x24.

Definition at line 274 of file MK60D10.h.