CAN_Type Struct Reference

CAN - Register Layout Typedef. More...

#include <cpu/arm/k60/include/MK60D10.h>

Data Fields
__IO uint32_t	MCR
	Module Configuration Register, offset: 0x0.
__IO uint32_t	CTRL1
	Control 1 register, offset: 0x4. More...
__IO uint32_t	TIMER
	Free Running Timer, offset: 0x8.
__IO uint32_t	RXMGMASK
	Rx Mailboxes Global Mask Register, offset: 0x10.
__IO uint32_t	RX14MASK
	Rx 14 Mask register, offset: 0x14. More...
__IO uint32_t	RX15MASK
	Rx 15 Mask register, offset: 0x18. More...
__IO uint32_t	ECR
	Error Counter, offset: 0x1C.
__IO uint32_t	ESR1
	Error and Status 1 register, offset: 0x20. More...
__IO uint32_t	IMASK1
	Interrupt Masks 1 register, offset: 0x28. More...
__IO uint32_t	IFLAG1
	Interrupt Flags 1 register, offset: 0x30. More...
__IO uint32_t	CTRL2
	Control 2 register, offset: 0x34. More...
__I uint32_t	ESR2
	Error and Status 2 register, offset: 0x38. More...
__I uint32_t	CRCR
	CRC Register, offset: 0x44.
__IO uint32_t	RXFGMASK
	Rx FIFO Global Mask register, offset: 0x48. More...
__I uint32_t	RXFIR
	Rx FIFO Information Register, offset: 0x4C.
__IO uint32_t	RXIMR [16]
	Rx Individual Mask Registers, array offset: 0x880, array step: 0x4.
__IO uint32_t	IMASK2
	Interrupt Masks 2 Register, offset: 0x24.
__IO uint32_t	IFLAG2
	Interrupt Flags 2 Register, offset: 0x2C.
__IO uint32_t	CS
	Message Buffer 0 CS Register..Message Buffer 15 CS Register, array offset: 0x80, array step: 0x10.
__IO uint32_t	ID
	Message Buffer 0 ID Register..Message Buffer 15 ID Register, array offset: 0x84, array step: 0x10.
__IO uint32_t	WORD0
	Message Buffer 0 WORD0 Register..Message Buffer 15 WORD0 Register, array offset: 0x88, array step: 0x10.
__IO uint32_t	WORD1
	Message Buffer 0 WORD1 Register..Message Buffer 15 WORD1 Register, array offset: 0x8C, array step: 0x10.

Detailed Description

CAN - Register Layout Typedef.

Definition at line 1488 of file MK60D10.h.

Field Documentation

__IO uint32_t CAN_Type::CTRL1

Control 1 register, offset: 0x4.

Control 1 Register, offset: 0x4.

Definition at line 1490 of file MK60D10.h.

__IO uint32_t CAN_Type::CTRL2

Control 2 register, offset: 0x34.

Control 2 Register, offset: 0x34.

Definition at line 1502 of file MK60D10.h.

__IO uint32_t CAN_Type::ESR1

Error and Status 1 register, offset: 0x20.

Error and Status 1 Register, offset: 0x20.

Definition at line 1497 of file MK60D10.h.

__I uint32_t CAN_Type::ESR2

Error and Status 2 register, offset: 0x38.

Error and Status 2 Register, offset: 0x38.

Definition at line 1503 of file MK60D10.h.

__IO uint32_t CAN_Type::IFLAG1

Interrupt Flags 1 register, offset: 0x30.

Interrupt Flags 1 Register, offset: 0x30.

Definition at line 1501 of file MK60D10.h.

__IO uint32_t CAN_Type::IMASK1

Interrupt Masks 1 register, offset: 0x28.

Interrupt Masks 1 Register, offset: 0x28.

Definition at line 1499 of file MK60D10.h.

__IO uint32_t CAN_Type::RX14MASK

Rx 14 Mask register, offset: 0x14.

Rx 14 Mask Register, offset: 0x14.

Definition at line 1494 of file MK60D10.h.

__IO uint32_t CAN_Type::RX15MASK

Rx 15 Mask register, offset: 0x18.

Rx 15 Mask Register, offset: 0x18.

Definition at line 1495 of file MK60D10.h.

__IO uint32_t CAN_Type::RXFGMASK

Rx FIFO Global Mask register, offset: 0x48.

Rx FIFO Global Mask Register, offset: 0x48.

Definition at line 1506 of file MK60D10.h.