FMC_Type Struct Reference

FMC - Register Layout Typedef. More...

#include <cpu/arm/k60/include/MK60D10.h>

Data Fields
__IO uint32_t	PFAPR
	Flash Access Protection Register, offset: 0x0.
__IO uint32_t	PFB0CR
	Flash Bank 0 Control Register, offset: 0x4.
__IO uint32_t	PFB1CR
	Flash Bank 1 Control Register, offset: 0x8.
__IO uint32_t	TAGVD [4][8]
	Cache Tag Storage, array offset: 0x100, array step: index*0x20, index2*0x4. More...
__IO uint32_t	DATA_U
	Cache Data Storage (upper word), array offset: 0x200, array step: index*0x40, index2*0x8.
__IO uint32_t	DATA_L
	Cache Data Storage (lower word), array offset: 0x204, array step: index*0x40, index2*0x8.

Detailed Description

FMC - Register Layout Typedef.

Definition at line 3794 of file MK60D10.h.

Field Documentation

__IO uint32_t FMC_Type::TAGVD

Cache Tag Storage, array offset: 0x100, array step: index*0x20, index2*0x4.

Cache Directory Storage, array offset: 0x100, array step: index*0x20, index2*0x4.

Definition at line 3799 of file MK60D10.h.