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Contiki 3.x
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UART - Register Layout Typedef. More...
#include <cpu/arm/k60/include/MK60D10.h>
Data Fields | |
| __IO uint8_t | BDH |
| UART Baud Rate Registers: High, offset: 0x0. More... | |
| __IO uint8_t | BDL |
| UART Baud Rate Registers: Low, offset: 0x1. | |
| __IO uint8_t | C1 |
| UART Control Register 1, offset: 0x2. | |
| __IO uint8_t | C2 |
| UART Control Register 2, offset: 0x3. | |
| __I uint8_t | S1 |
| UART Status Register 1, offset: 0x4. | |
| __IO uint8_t | S2 |
| UART Status Register 2, offset: 0x5. | |
| __IO uint8_t | C3 |
| UART Control Register 3, offset: 0x6. | |
| __IO uint8_t | D |
| UART Data Register, offset: 0x7. | |
| __IO uint8_t | MA1 |
| UART Match Address Registers 1, offset: 0x8. | |
| __IO uint8_t | MA2 |
| UART Match Address Registers 2, offset: 0x9. | |
| __IO uint8_t | C4 |
| UART Control Register 4, offset: 0xA. | |
| __IO uint8_t | C5 |
| UART Control Register 5, offset: 0xB. | |
| __I uint8_t | ED |
| UART Extended Data Register, offset: 0xC. | |
| __IO uint8_t | MODEM |
| UART Modem Register, offset: 0xD. | |
| __IO uint8_t | IR |
| UART Infrared Register, offset: 0xE. | |
| __IO uint8_t | PFIFO |
| UART FIFO Parameters, offset: 0x10. | |
| __IO uint8_t | CFIFO |
| UART FIFO Control Register, offset: 0x11. | |
| __IO uint8_t | SFIFO |
| UART FIFO Status Register, offset: 0x12. | |
| __IO uint8_t | TWFIFO |
| UART FIFO Transmit Watermark, offset: 0x13. | |
| __I uint8_t | TCFIFO |
| UART FIFO Transmit Count, offset: 0x14. | |
| __IO uint8_t | RWFIFO |
| UART FIFO Receive Watermark, offset: 0x15. | |
| __I uint8_t | RCFIFO |
| UART FIFO Receive Count, offset: 0x16. | |
| __IO uint8_t | C7816 |
| UART 7816 Control Register, offset: 0x18. | |
| __IO uint8_t | IE7816 |
| UART 7816 Interrupt Enable Register, offset: 0x19. | |
| __IO uint8_t | IS7816 |
| UART 7816 Interrupt Status Register, offset: 0x1A. | |
| __IO uint8_t | WN7816 |
| UART 7816 Wait N Register, offset: 0x1C. | |
| __IO uint8_t | WF7816 |
| UART 7816 Wait FD Register, offset: 0x1D. | |
| __IO uint8_t | ET7816 |
| UART 7816 Error Threshold Register, offset: 0x1E. | |
| __IO uint8_t | TL7816 |
| UART 7816 Transmit Length Register, offset: 0x1F. | |
| __IO uint8_t | C6 |
| UART CEA709.1-B Control Register 6, offset: 0x21. | |
| __IO uint8_t | PCTH |
| UART CEA709.1-B Packet Cycle Time Counter High, offset: 0x22. | |
| __IO uint8_t | PCTL |
| UART CEA709.1-B Packet Cycle Time Counter Low, offset: 0x23. | |
| __IO uint8_t | B1T |
| UART CEA709.1-B Beta1 Timer, offset: 0x24. | |
| __IO uint8_t | SDTH |
| UART CEA709.1-B Secondary Delay Timer High, offset: 0x25. | |
| __IO uint8_t | SDTL |
| UART CEA709.1-B Secondary Delay Timer Low, offset: 0x26. | |
| __IO uint8_t | PRE |
| UART CEA709.1-B Preamble, offset: 0x27. | |
| __IO uint8_t | TPL |
| UART CEA709.1-B Transmit Packet Length, offset: 0x28. | |
| __IO uint8_t | IE |
| UART CEA709.1-B Interrupt Enable Register, offset: 0x29. | |
| __IO uint8_t | WB |
| UART CEA709.1-B WBASE, offset: 0x2A. | |
| __IO uint8_t | S3 |
| UART CEA709.1-B Status Register, offset: 0x2B. | |
| __IO uint8_t | S4 |
| UART CEA709.1-B Status Register, offset: 0x2C. | |
| __I uint8_t | RPL |
| UART CEA709.1-B Received Packet Length, offset: 0x2D. | |
| __I uint8_t | RPREL |
| UART CEA709.1-B Received Preamble Length, offset: 0x2E. | |
| __IO uint8_t | CPW |
| UART CEA709.1-B Collision Pulse Width, offset: 0x2F. | |
| __IO uint8_t | RIDT |
| UART CEA709.1-B Receive Indeterminate Time, offset: 0x30. | |
| __IO uint8_t | TIDT |
| UART CEA709.1-B Transmit Indeterminate Time, offset: 0x31. | |
| __IO uint8_t | WP7816_T_TYPE0 |
| UART 7816 Wait Parameter Register, offset: 0x1B. | |
| __IO uint8_t | WP7816_T_TYPE1 |
| UART 7816 Wait Parameter Register, offset: 0x1B. | |
| __IO uint8_t UART_Type::BDH |
UART Baud Rate Registers: High, offset: 0x0.
UART Baud Rate Registers:High, offset: 0x0.
Definition at line 8222 of file MK60D10.h.
Referenced by uart_init().
1.8.5