Contiki 3.x
port.c
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1 /*
2  * Copyright (c) 2014, Eistec AB.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the copyright holder nor the names of its contributors
14  * may be used to endorse or promote products derived from this software
15  * without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
21  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  * POSSIBILITY OF SUCH DAMAGE.
28  *
29  * This file is part of the Mulle platform port of the Contiki operating system.
30  *
31  */
32 
33 /**
34  * \file
35  * Pin mux handling functions for Kinetis platforms.
36  * \author
37  * Joakim Gebart <joakim.gebart@eistec.se>
38  */
39 
40 #include "port.h"
41 
42 void
43 port_module_enable(PORT_Type *port)
44 {
45  if(port == PORTA) {
46  SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
47  } else if(port == PORTB) {
48  SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK;
49  } else if(port == PORTC) {
50  SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
51  } else if(port == PORTD) {
52  SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK;
53  } else if(port == PORTE) {
54  SIM->SCGC5 |= SIM_SCGC5_PORTE_MASK;
55  } else {
56  DEBUGGER_BREAK(BREAK_INVALID_PARAM);
57  return;
58  }
59 }
#define PORTE
Peripheral PORTE base pointer.
Definition: MK60D10.h:6431
#define PORTB
Peripheral PORTB base pointer.
Definition: MK60D10.h:6419
#define SIM
Peripheral SIM base pointer.
Definition: MK60D10.h:7650
#define DEBUGGER_BREAK(sig)
Make the CPU signal to the debugger and break execution by issuing a bkpt instruction.
Definition: K60.h:164
Pin mux handling functions for Kinetis platforms.
#define PORTC
Peripheral PORTC base pointer.
Definition: MK60D10.h:6423
#define PORTA
Peripheral PORTA base pointer.
Definition: MK60D10.h:6415
#define PORTD
Peripheral PORTD base pointer.
Definition: MK60D10.h:6427
PORT - Register Layout Typedef.
Definition: MK60D10.h:6332