Contiki 3.x
udelay.c
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1 /**
2  * \file
3  * Provide udelay routine for MK60DZ10.
4  * \author
5  * Tony Persson <tony.persson@rubico.com>
6  */
7 
8 #include "K60.h"
9 #include "config-clocks.h"
10 
11 void
12 udelay_init(void)
13 {
14  /* Enable peripheral clock */
15  SIM->SCGC6 |= SIM_SCGC6_PIT_MASK;
16  /* Reset logic to a known state */
17  PIT->MCR = 0x00;
18 }
19 
20 /**
21  * Microsecond busy wait.
22  *
23  * \param [in] us number of microseconds to sleep.
24  */
25 void
26 udelay(uint16_t us)
27 {
28  /* Don't hang on zero µs sleep. */
29  if (us == 0) return;
30 
31  /* Set up timer */
32  PIT->CHANNEL[0].LDVAL = PIT_LDVAL_TSV((F_BUS / 1000000) * (uint32_t)us);
33 
34  /* Disable timer to load a new value */
35  BITBAND_REG(PIT->CHANNEL[0].TCTRL, PIT_TCTRL_TEN_SHIFT) = 0;
36 
37  /* Clear interrupt flag */
38  BITBAND_REG(PIT->CHANNEL[0].TFLG, PIT_TFLG_TIF_SHIFT) = 1;
39 
40  /* Enable timer, no interrupt, no chaining */
41  PIT->CHANNEL[0].TCTRL = PIT_TCTRL_TEN_MASK;
42 
43  /* Wait for completion */
44  while(!(PIT->CHANNEL[0].TFLG & PIT_TFLG_TIF_MASK));
45 
46  /* Disable everything */
47  PIT->CHANNEL[0].TCTRL = 0x00;
48 }
K60 clock configuration defines.
#define SIM
Peripheral SIM base pointer.
Definition: MK60D10.h:7650
#define F_BUS
Bus frequency resulting from the chosen divisors and multipliers.
Definition: config-clocks.h:97
void udelay(uint16_t us)
Microsecond busy wait.
Definition: udelay.c:26
K60 hardware register header wrapper.
#define PIT
Peripheral PIT base pointer.
Definition: MK60D10.h:6238
#define BITBAND_REG(Reg, Bit)
Macro to access a single bit of a peripheral register (bit band region 0x40000000 to 0x400FFFFF) usin...
Definition: MK60D10.h:71