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Contiki 3.x
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Type definitions for the Instrumentation Trace Macrocell (ITM) More...
Data Structures | |
| struct | ITM_Type |
| Structure type to access the Instrumentation Trace Macrocell Register (ITM). More... | |
Macros | |
| #define | ITM_TPR_PRIVMASK_Pos 0 |
| #define | ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) |
| #define | ITM_TCR_BUSY_Pos 23 |
| #define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
| #define | ITM_TCR_TraceBusID_Pos 16 |
| #define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
| #define | ITM_TCR_GTSFREQ_Pos 10 |
| #define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
| #define | ITM_TCR_TSPrescale_Pos 8 |
| #define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
| #define | ITM_TCR_SWOENA_Pos 4 |
| #define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
| #define | ITM_TCR_DWTENA_Pos 3 |
| #define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
| #define | ITM_TCR_SYNCENA_Pos 2 |
| #define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
| #define | ITM_TCR_TSENA_Pos 1 |
| #define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
| #define | ITM_TCR_ITMENA_Pos 0 |
| #define | ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) |
| #define | ITM_IWR_ATVALIDM_Pos 0 |
| #define | ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) |
| #define | ITM_IRR_ATREADYM_Pos 0 |
| #define | ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) |
| #define | ITM_IMCR_INTEGRATION_Pos 0 |
| #define | ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) |
| #define | ITM_LSR_ByteAcc_Pos 2 |
| #define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
| #define | ITM_LSR_Access_Pos 1 |
| #define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
| #define | ITM_LSR_Present_Pos 0 |
| #define | ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) |
| #define | ITM_TPR_PRIVMASK_Pos 0 |
| #define | ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) |
| #define | ITM_TCR_BUSY_Pos 23 |
| #define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
| #define | ITM_TCR_TraceBusID_Pos 16 |
| #define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
| #define | ITM_TCR_GTSFREQ_Pos 10 |
| #define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
| #define | ITM_TCR_TSPrescale_Pos 8 |
| #define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
| #define | ITM_TCR_SWOENA_Pos 4 |
| #define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
| #define | ITM_TCR_DWTENA_Pos 3 |
| #define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
| #define | ITM_TCR_SYNCENA_Pos 2 |
| #define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
| #define | ITM_TCR_TSENA_Pos 1 |
| #define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
| #define | ITM_TCR_ITMENA_Pos 0 |
| #define | ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) |
| #define | ITM_IWR_ATVALIDM_Pos 0 |
| #define | ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) |
| #define | ITM_IRR_ATREADYM_Pos 0 |
| #define | ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) |
| #define | ITM_IMCR_INTEGRATION_Pos 0 |
| #define | ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) |
| #define | ITM_LSR_ByteAcc_Pos 2 |
| #define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
| #define | ITM_LSR_Access_Pos 1 |
| #define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
| #define | ITM_LSR_Present_Pos 0 |
| #define | ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) |
| #define | ITM_TPR_PRIVMASK_Pos 0 |
| #define | ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) |
| #define | ITM_TCR_BUSY_Pos 23 |
| #define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
| #define | ITM_TCR_TraceBusID_Pos 16 |
| #define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
| #define | ITM_TCR_GTSFREQ_Pos 10 |
| #define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
| #define | ITM_TCR_TSPrescale_Pos 8 |
| #define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
| #define | ITM_TCR_SWOENA_Pos 4 |
| #define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
| #define | ITM_TCR_DWTENA_Pos 3 |
| #define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
| #define | ITM_TCR_SYNCENA_Pos 2 |
| #define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
| #define | ITM_TCR_TSENA_Pos 1 |
| #define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
| #define | ITM_TCR_ITMENA_Pos 0 |
| #define | ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) |
| #define | ITM_IWR_ATVALIDM_Pos 0 |
| #define | ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) |
| #define | ITM_IRR_ATREADYM_Pos 0 |
| #define | ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) |
| #define | ITM_IMCR_INTEGRATION_Pos 0 |
| #define | ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) |
| #define | ITM_LSR_ByteAcc_Pos 2 |
| #define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
| #define | ITM_LSR_Access_Pos 1 |
| #define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
| #define | ITM_LSR_Present_Pos 0 |
| #define | ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) |
Type definitions for the Instrumentation Trace Macrocell (ITM)
| #define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) |
ITM IMCR: INTEGRATION Mask
Definition at line 709 of file core_sc300.h.
| #define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) |
ITM IMCR: INTEGRATION Mask
Definition at line 729 of file core_cm3.h.
| #define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) |
ITM IMCR: INTEGRATION Mask
Definition at line 769 of file core_cm4.h.
| #define ITM_IMCR_INTEGRATION_Pos 0 |
ITM IMCR: INTEGRATION Position
Definition at line 708 of file core_sc300.h.
| #define ITM_IMCR_INTEGRATION_Pos 0 |
ITM IMCR: INTEGRATION Position
Definition at line 728 of file core_cm3.h.
| #define ITM_IMCR_INTEGRATION_Pos 0 |
ITM IMCR: INTEGRATION Position
Definition at line 768 of file core_cm4.h.
| #define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) |
ITM IRR: ATREADYM Mask
Definition at line 705 of file core_sc300.h.
| #define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) |
ITM IRR: ATREADYM Mask
Definition at line 725 of file core_cm3.h.
| #define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) |
ITM IRR: ATREADYM Mask
Definition at line 765 of file core_cm4.h.
| #define ITM_IRR_ATREADYM_Pos 0 |
ITM IRR: ATREADYM Position
Definition at line 704 of file core_sc300.h.
| #define ITM_IRR_ATREADYM_Pos 0 |
ITM IRR: ATREADYM Position
Definition at line 724 of file core_cm3.h.
| #define ITM_IRR_ATREADYM_Pos 0 |
ITM IRR: ATREADYM Position
Definition at line 764 of file core_cm4.h.
| #define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) |
ITM IWR: ATVALIDM Mask
Definition at line 701 of file core_sc300.h.
| #define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) |
ITM IWR: ATVALIDM Mask
Definition at line 721 of file core_cm3.h.
| #define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) |
ITM IWR: ATVALIDM Mask
Definition at line 761 of file core_cm4.h.
| #define ITM_IWR_ATVALIDM_Pos 0 |
ITM IWR: ATVALIDM Position
Definition at line 700 of file core_sc300.h.
| #define ITM_IWR_ATVALIDM_Pos 0 |
ITM IWR: ATVALIDM Position
Definition at line 720 of file core_cm3.h.
| #define ITM_IWR_ATVALIDM_Pos 0 |
ITM IWR: ATVALIDM Position
Definition at line 760 of file core_cm4.h.
| #define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 716 of file core_sc300.h.
| #define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 736 of file core_cm3.h.
| #define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 776 of file core_cm4.h.
| #define ITM_LSR_Access_Pos 1 |
ITM LSR: Access Position
Definition at line 715 of file core_sc300.h.
| #define ITM_LSR_Access_Pos 1 |
ITM LSR: Access Position
Definition at line 735 of file core_cm3.h.
| #define ITM_LSR_Access_Pos 1 |
ITM LSR: Access Position
Definition at line 775 of file core_cm4.h.
| #define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 713 of file core_sc300.h.
| #define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 733 of file core_cm3.h.
| #define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 773 of file core_cm4.h.
| #define ITM_LSR_ByteAcc_Pos 2 |
ITM LSR: ByteAcc Position
Definition at line 712 of file core_sc300.h.
| #define ITM_LSR_ByteAcc_Pos 2 |
ITM LSR: ByteAcc Position
Definition at line 732 of file core_cm3.h.
| #define ITM_LSR_ByteAcc_Pos 2 |
ITM LSR: ByteAcc Position
Definition at line 772 of file core_cm4.h.
| #define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) |
ITM LSR: Present Mask
Definition at line 719 of file core_sc300.h.
| #define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) |
ITM LSR: Present Mask
Definition at line 739 of file core_cm3.h.
| #define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) |
ITM LSR: Present Mask
Definition at line 779 of file core_cm4.h.
| #define ITM_LSR_Present_Pos 0 |
ITM LSR: Present Position
Definition at line 718 of file core_sc300.h.
| #define ITM_LSR_Present_Pos 0 |
ITM LSR: Present Position
Definition at line 738 of file core_cm3.h.
| #define ITM_LSR_Present_Pos 0 |
ITM LSR: Present Position
Definition at line 778 of file core_cm4.h.
| #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 673 of file core_sc300.h.
| #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 693 of file core_cm3.h.
| #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 733 of file core_cm4.h.
| #define ITM_TCR_BUSY_Pos 23 |
ITM TCR: BUSY Position
Definition at line 672 of file core_sc300.h.
| #define ITM_TCR_BUSY_Pos 23 |
ITM TCR: BUSY Position
Definition at line 692 of file core_cm3.h.
| #define ITM_TCR_BUSY_Pos 23 |
ITM TCR: BUSY Position
Definition at line 732 of file core_cm4.h.
| #define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 688 of file core_sc300.h.
| #define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 708 of file core_cm3.h.
| #define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 748 of file core_cm4.h.
| #define ITM_TCR_DWTENA_Pos 3 |
ITM TCR: DWTENA Position
Definition at line 687 of file core_sc300.h.
| #define ITM_TCR_DWTENA_Pos 3 |
ITM TCR: DWTENA Position
Definition at line 707 of file core_cm3.h.
| #define ITM_TCR_DWTENA_Pos 3 |
ITM TCR: DWTENA Position
Definition at line 747 of file core_cm4.h.
| #define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
ITM TCR: Global timestamp frequency Mask
Definition at line 679 of file core_sc300.h.
| #define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
ITM TCR: Global timestamp frequency Mask
Definition at line 699 of file core_cm3.h.
| #define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
ITM TCR: Global timestamp frequency Mask
Definition at line 739 of file core_cm4.h.
| #define ITM_TCR_GTSFREQ_Pos 10 |
ITM TCR: Global timestamp frequency Position
Definition at line 678 of file core_sc300.h.
| #define ITM_TCR_GTSFREQ_Pos 10 |
ITM TCR: Global timestamp frequency Position
Definition at line 698 of file core_cm3.h.
| #define ITM_TCR_GTSFREQ_Pos 10 |
ITM TCR: Global timestamp frequency Position
Definition at line 738 of file core_cm4.h.
| #define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) |
ITM TCR: ITM Enable bit Mask
Definition at line 697 of file core_sc300.h.
| #define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) |
ITM TCR: ITM Enable bit Mask
Definition at line 717 of file core_cm3.h.
Referenced by ITM_SendChar().
| #define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) |
ITM TCR: ITM Enable bit Mask
Definition at line 757 of file core_cm4.h.
| #define ITM_TCR_ITMENA_Pos 0 |
ITM TCR: ITM Enable bit Position
Definition at line 696 of file core_sc300.h.
| #define ITM_TCR_ITMENA_Pos 0 |
ITM TCR: ITM Enable bit Position
Definition at line 716 of file core_cm3.h.
| #define ITM_TCR_ITMENA_Pos 0 |
ITM TCR: ITM Enable bit Position
Definition at line 756 of file core_cm4.h.
| #define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 685 of file core_sc300.h.
| #define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 705 of file core_cm3.h.
| #define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 745 of file core_cm4.h.
| #define ITM_TCR_SWOENA_Pos 4 |
ITM TCR: SWOENA Position
Definition at line 684 of file core_sc300.h.
| #define ITM_TCR_SWOENA_Pos 4 |
ITM TCR: SWOENA Position
Definition at line 704 of file core_cm3.h.
| #define ITM_TCR_SWOENA_Pos 4 |
ITM TCR: SWOENA Position
Definition at line 744 of file core_cm4.h.
| #define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 691 of file core_sc300.h.
| #define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 711 of file core_cm3.h.
| #define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 751 of file core_cm4.h.
| #define ITM_TCR_SYNCENA_Pos 2 |
ITM TCR: SYNCENA Position
Definition at line 690 of file core_sc300.h.
| #define ITM_TCR_SYNCENA_Pos 2 |
ITM TCR: SYNCENA Position
Definition at line 710 of file core_cm3.h.
| #define ITM_TCR_SYNCENA_Pos 2 |
ITM TCR: SYNCENA Position
Definition at line 750 of file core_cm4.h.
| #define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
ITM TCR: ATBID Mask
Definition at line 676 of file core_sc300.h.
| #define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
ITM TCR: ATBID Mask
Definition at line 696 of file core_cm3.h.
| #define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
ITM TCR: ATBID Mask
Definition at line 736 of file core_cm4.h.
| #define ITM_TCR_TraceBusID_Pos 16 |
ITM TCR: ATBID Position
Definition at line 675 of file core_sc300.h.
| #define ITM_TCR_TraceBusID_Pos 16 |
ITM TCR: ATBID Position
Definition at line 695 of file core_cm3.h.
| #define ITM_TCR_TraceBusID_Pos 16 |
ITM TCR: ATBID Position
Definition at line 735 of file core_cm4.h.
| #define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 694 of file core_sc300.h.
| #define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 714 of file core_cm3.h.
| #define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 754 of file core_cm4.h.
| #define ITM_TCR_TSENA_Pos 1 |
ITM TCR: TSENA Position
Definition at line 693 of file core_sc300.h.
| #define ITM_TCR_TSENA_Pos 1 |
ITM TCR: TSENA Position
Definition at line 713 of file core_cm3.h.
| #define ITM_TCR_TSENA_Pos 1 |
ITM TCR: TSENA Position
Definition at line 753 of file core_cm4.h.
| #define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 682 of file core_sc300.h.
| #define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 702 of file core_cm3.h.
| #define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 742 of file core_cm4.h.
| #define ITM_TCR_TSPrescale_Pos 8 |
ITM TCR: TSPrescale Position
Definition at line 681 of file core_sc300.h.
| #define ITM_TCR_TSPrescale_Pos 8 |
ITM TCR: TSPrescale Position
Definition at line 701 of file core_cm3.h.
| #define ITM_TCR_TSPrescale_Pos 8 |
ITM TCR: TSPrescale Position
Definition at line 741 of file core_cm4.h.
| #define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) |
ITM TPR: PRIVMASK Mask
Definition at line 669 of file core_sc300.h.
| #define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) |
ITM TPR: PRIVMASK Mask
Definition at line 689 of file core_cm3.h.
| #define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) |
ITM TPR: PRIVMASK Mask
Definition at line 729 of file core_cm4.h.
| #define ITM_TPR_PRIVMASK_Pos 0 |
ITM TPR: PRIVMASK Position
Definition at line 668 of file core_sc300.h.
| #define ITM_TPR_PRIVMASK_Pos 0 |
ITM TPR: PRIVMASK Position
Definition at line 688 of file core_cm3.h.
| #define ITM_TPR_PRIVMASK_Pos 0 |
ITM TPR: PRIVMASK Position
Definition at line 728 of file core_cm4.h.
1.8.5