The cc2538DK is the new platform by Texas Instruments, based on the cc2530 SoC with an ARM Cortex-M3 core. More...

Modules
	cc2538 Clock
	Implementation of the clock module for the cc2538.

	cc2538 CPU
	cc2538 CPU-specific functions for the cc2538 core

	cc2538 Character I/O
	cc2538 CPU-specific functions for debugging and SLIP I/O

	cc2538 IEEE Address Control
	Driver for the retrieval of an IEEE address from flash.

	cc2538 Low Power Modes
	Driver for the cc2538 power modes.

	cc2538 Register Manipulation
	Macros for hardware access, both direct and via the bit-band region.

	cc2538 rtimer
	Implementation of the rtimer module for the cc2538.

	cc2538 ADC
	Driver for the cc2538 ADC controller.

	cc2538 RF Driver
	Driver implementation for the cc2538 RF transceiver.

	cc2538 flash CCA
	Definitions for the cc2538 flash lock bit page and customer configuration area.

	cc2538 General-Purpose I/O
	Driver for the cc2538 GPIO controller.

	cc2538 General-Purpose Timers
	Driver for the cc2538 General Purpose Timers.

	cc2538 I/O Control
	cc2538 I/O Control Module

	cc2538 Memory Protection Unit
	Driver for the cc2538 Memory Protection Unit.

	cc2538 Nested Vectored Interrupt Controller
	Driver for the cc2538 NVIC controller.

	cc2538 Random Number Generator
	Driver for the cc2538 Hardware Random Number Generator.

	cc2538 RF Core
	Declarations of RF Core registers.

	cc2538 ROM utility function library
	Driver for the cc2538 ROM utility function library.

	cc2538 System Control Block

	cc2538 Sleep Timer and Watchdog
	Register declarations for the cc2538 Sleep Timer and Watchdog.

	cc2538 ADC and RNG
	Register declarations for the cc2538 ADC and H/W RNG.

	cc2538 Synchronous Serial Interface
	Driver for the cc2538 SPI peripheral.

	cc2538 System Control
	Driver for the cc2538 System Control Module.

	cc2538 UART
	Driver for the cc2538 UART controller.

	cc2538 micro-DMA
	Driver for the cc2538 uDMA controller.

	cc2538 USB controller
	Driver for the cc2538 USB controller.

	cc2538 watchdog timer driver
	Driver for the cc2538 Watchdog Timer.

	SmartRF06EB Peripherals
	Defines related to the SmartRF06EB.

Files
file	spi-arch.h
	Header file for the cc2538 SPI commands.

file	contiki-conf.h
	Configuration for the cc2538dk platform.

file	contiki-main.c
	Main module for the cc2538dk platform.

file	startup-gcc.c
	Startup code for the cc2538dk platform, to be used when building with gcc.

Functions
int	main (void)
	Main routine for the cc2538dk platform. More...

void	clock_isr (void)
	The clock Interrupt Service Routine. More...

void	gpio_port_a_isr (void)
	Interrupt service routine for Port A.

void	gpio_port_b_isr (void)
	Interrupt service routine for Port B.

void	gpio_port_c_isr (void)
	Interrupt service routine for Port C.

void	gpio_port_d_isr (void)
	Interrupt service routine for Port D.

void	rtimer_isr (void)
	The rtimer ISR. More...

void	cc2538_rf_rx_tx_isr (void)
	The cc2538 RF RX/TX ISR. More...

void	cc2538_rf_err_isr (void)
	The cc2538 RF Error ISR. More...

Arch-specific SPI functions
void	spi_cs_init (uint8_t port, uint8_t pin)
	Configure a GPIO to be the chip select pin.

void	spi_enable (void)
	Enables the SPI peripheral.

void	spi_disable (void)
	Disables the SPI peripheral. More...

void	spi_set_mode (uint32_t frame_format, uint32_t clock_polarity, uint32_t clock_phase, uint32_t data_size)
	Configure the SPI data and clock polarity and the data size. More...

Compiler configuration and platform-specific type definitions
Those values are not meant to be modified by the user
typedef uint32_t	clock_time_t

typedef uint32_t	uip_stats_t

typedef uint32_t	rtimer_clock_t

#define	CLOCK_CONF_SECOND 128

#define	CCIF

#define	CLIF

#define	RTIMER_CLOCK_LT(a, b) ((int32_t)((a)-(b)) < 0)

Serial Boot Loader Backdoor configuration
#define	FLASH_CCA_CONF_BOOTLDR_BACKDOOR 1
	Enable the boot loader backdoor.

#define	FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN 3
	Pin PA_3 (Select button) activates the boot loader.

#define	FLASH_CCA_CONF_BOOTLDR_BACKDOOR_ACTIVE_HIGH 0
	A logic low level activates the boot loader.

Flash Memory configuration
#define	FLASH_CONF_ORIGIN 0x00200000

#define	FLASH_CONF_SIZE 0x00080000 /* 512 KiB */

Watchdog Timer configuration
#define	WATCHDOG_CONF_ENABLE 1
	Enable the watchdog timer.

USB 'core' configuration
Those values are not meant to be modified by the user, except where stated otherwise
#define	CTRL_EP_SIZE 8

#define	USB_EP1_SIZE 32

#define	USB_EP2_SIZE 64

#define	USB_EP3_SIZE 64

#define	USB_ARCH_WRITE_NOTIFY 0

#define	USB_ARCH_CONF_DMA 1
	Change to Enable/Disable USB DMA.

Generic Configuration directives
#define	ENERGEST_CONF_ON 0
	Energest Module.

#define	STARTUP_CONF_VERBOSE 1
	Set to 0 to decrease startup verbosity.

uDMA Configuration and channel allocations
#define	USB_ARCH_CONF_RX_DMA_CHAN 0
	USB -> RAM DMA channel.

#define	USB_ARCH_CONF_TX_DMA_CHAN 1
	RAM -> USB DMA channel.

#define	CC2538_RF_CONF_TX_DMA_CHAN 2
	RF -> RAM DMA channel.

#define	CC2538_RF_CONF_RX_DMA_CHAN 3
	RAM -> RF DMA channel.

#define	UDMA_CONF_MAX_CHANNEL CC2538_RF_CONF_RX_DMA_CHAN

Character I/O Configuration
#define	UART_CONF_ENABLE 1
	Enable/Disable UART I/O.

#define	UART0_CONF_BAUD_RATE 115200
	Default UART0 baud rate.

#define	UART1_CONF_BAUD_RATE 115200
	Default UART1 baud rate.

#define	SLIP_ARCH_CONF_USB 0
	SLIP over UART by default.

#define	CC2538_RF_CONF_SNIFFER_USB 0
	Sniffer out over UART by default.

#define	DBG_CONF_USB 0
	All debugging over UART by default.

#define	SERIAL_LINE_CONF_UART 0
	UART to use with serial line.

#define	SLIP_ARCH_CONF_UART 0
	UART to use with SLIP.

#define	CC2538_RF_CONF_SNIFFER_UART 0
	UART to use with sniffer.

#define	DBG_CONF_UART 0
	UART to use for debugging.

#define	UART1_CONF_UART 0
	UART to use for examples relying on the uart1_* API.

#define	SLIP_BRIDGE_CONF_NO_PUTCHAR 1

#define	SLIP_RADIO_CONF_NO_PUTCHAR 1

#define	CC2538_RF_CONF_SNIFFER 0

#define	CC2538_CONF_QUIET 0
	Define this as 1 to build a headless node. More...

#define	USB_SERIAL_CONF_ENABLE
	Enable the USB core only if we need it.

#define	UART_IN_USE_BY_SERIAL_LINE(u) (SERIAL_LINE_CONF_UART == (u))

#define	UART_IN_USE_BY_SLIP(u)

#define	UART_IN_USE_BY_RF_SNIFFER(u)

#define	UART_IN_USE_BY_DBG(u) (!DBG_CONF_USB && DBG_CONF_UART == (u))

#define	UART_IN_USE_BY_UART1(u) (UART1_CONF_UART == (u))

#define	UART_IN_USE(u)

Network Stack Configuration
#define	NETSTACK_CONF_NETWORK sicslowpan_driver

#define	NETSTACK_CONF_MAC csma_driver

#define	NETSTACK_CONF_RDC contikimac_driver

#define	NULLRDC_802154_AUTOACK 1

#define	NULLRDC_802154_AUTOACK_HW 1

#define	CONTIKIMAC_CONF_WITH_PHASE_OPTIMIZATION 0

#define	WITH_FAST_SLEEP 1

#define	NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE 8

#define	NETSTACK_CONF_FRAMER framer_802154

#define	NETSTACK_CONF_RADIO cc2538_rf_driver

LPM configuration
#define	LPM_CONF_ENABLE 1
	Set to 0 to disable LPM entirely.

#define	LPM_CONF_MAX_PM 1
	Maximum PM. More...

#define	LPM_CONF_STATS 0
	Set to 1 to enable LPM-related stats.

IEEE address configuration
Used to generate our RIME & IPv6 address
#define	IEEE_ADDR_CONF_HARDCODED 0
	Location of the IEEE address 0 => Read from InfoPage, 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS.

#define	IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
	The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED is defined as 1.

#define	IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
	Location of the IEEE address in the InfoPage when IEEE_ADDR_CONF_HARDCODED is defined as 0 0 => Use the primary address location 1 => Use the secondary address location.

RF configuration
#define	IEEE802154_CONF_PANID 0x5449
	Default PAN ID: TI.

#define	CC2538_RF_CONF_CHANNEL 25

#define	CC2538_RF_CONF_AUTOACK 1
	RF H/W generates ACKs.

#define	CC2538_RF_CONF_TX_USE_DMA 1
	RF TX over DMA.

#define	CC2538_RF_CONF_RX_USE_DMA 1
	RF RX over DMA.

IPv6, RIME and network buffer configuration
#define	LINKADDR_CONF_SIZE 8

#define	UIP_CONF_LL_802154 1

#define	UIP_CONF_LLH_LEN 0

#define	UIP_CONF_NETIF_MAX_ADDRESSES 3

#define	UIP_CONF_TCP 1

#define	UIP_CONF_TCP_MSS 64

#define	UIP_CONF_UDP 1

#define	UIP_CONF_UDP_CHECKSUMS 1

#define	UIP_CONF_ICMP6 1

#define	UIP_CONF_ROUTER 1

#define	UIP_CONF_ND6_SEND_RA 0

#define	UIP_CONF_IP_FORWARD 0

#define	RPL_CONF_STATS 0

#define	RPL_CONF_MAX_DAG_ENTRIES 1

#define	RPL_CONF_OF rpl_mrhof

#define	UIP_CONF_ND6_REACHABLE_TIME 600000

#define	UIP_CONF_ND6_RETRANS_TIMER 10000

#define	NBR_TABLE_CONF_MAX_NEIGHBORS 20

#define	UIP_CONF_MAX_ROUTES 20

#define	UIP_CONF_BUFFER_SIZE 1300

#define	UIP_CONF_IPV6_QUEUE_PKT 0

#define	UIP_CONF_IPV6_CHECKS 1

#define	UIP_CONF_IPV6_REASSEMBLY 0

#define	UIP_CONF_MAX_LISTENPORTS 8

#define	SICSLOWPAN_CONF_COMPRESSION SICSLOWPAN_COMPRESSION_HC06

#define	SICSLOWPAN_CONF_COMPRESSION_THRESHOLD 63

#define	SICSLOWPAN_CONF_FRAG 1

#define	SICSLOWPAN_CONF_MAXAGE 8

#define	SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS 1

#define	SICSLOWPAN_CONF_ADDR_CONTEXT_0

#define	MAC_CONF_CHANNEL_CHECK_RATE 8

#define	QUEUEBUF_CONF_NUM 8

Detailed Description

The cc2538DK is the new platform by Texas Instruments, based on the cc2530 SoC with an ARM Cortex-M3 core.

Implementation of the low-level SPI primitives such as waiting for the TX FIFO to be ready, inserting into the TX FIFO, etc.

Macro Definition Documentation

#define CC2538_CONF_QUIET 0

Define this as 1 to build a headless node.

The UART will not be initialised its clock will be gated, offering some energy savings. The USB will not be initialised either

Definition at line 219 of file contiki-conf.h.

#define LPM_CONF_MAX_PM 1

Maximum PM.

The SoC will never drop to a Power Mode deeper than the one specified here. 0 for PM0, 1 for PM1 and 2 for PM2

Definition at line 341 of file contiki-conf.h.

Function Documentation

void cc2538_rf_err_isr ( void )

The cc2538 RF Error ISR.

This is the interrupt service routine for all RF errors. We acknowledge every error type and instead of trying to be smart and act differently depending on error condition, we simply reset the transceiver. RX FIFO overflow is an exception, we ignore this error since read() handles it anyway.

However, we don't want to reset within this ISR. If the error occurs while we are reading a frame out of the FIFO, trashing the FIFO in the middle of read(), would result in further errors (RX underflows).

Instead, we set a flag and poll the driver process. The process will reset the transceiver without any undesirable consequences.

Definition at line 1001 of file cc2538-rf.c.

References process_poll(), RFCORE_SFR_RFERRF, and RFCORE_SFR_RFERRF_RXOVERF.

void cc2538_rf_rx_tx_isr ( void )

The cc2538 RF RX/TX ISR.

This is the interrupt service routine for all RF interrupts relating to RX and TX. Error conditions are handled by cc2538_rf_err_isr(). Currently, we only acknowledge the FIFOP interrupt source.

Definition at line 972 of file cc2538-rf.c.

References process_poll(), and RFCORE_SFR_RFIRQF0.

void clock_isr ( void )

The clock Interrupt Service Routine.

It polls the etimer process if an etimer has expired. It also updates the software clock tick and seconds counter.

Definition at line 238 of file clock.c.

References DISABLE_INTERRUPTS, etimer_next_expiration_time(), etimer_pending(), and etimer_request_poll().

int main ( void )

Main routine for the cc2538dk platform.

This is main...

Definition at line 140 of file contiki-main.c.

References button_sensor_init(), clock_init(), ctimer_init(), gpio_init(), INTERRUPTS_ENABLE, ioc_init(), LEDS_GREEN, LEDS_ORANGE, LEDS_YELLOW, linkaddr_node_addr, lpm_enter, lpm_init, NULL, nvic_init(), process_init(), process_run(), process_start(), random_init(), rtimer_init(), SERIAL_LINE_CONF_UART, serial_line_input_byte(), sys_ctrl_init(), uart_init(), uart_set_input(), udma_init(), uip_lladdr, usb_serial_init(), usb_serial_set_input(), watchdog_init(), watchdog_periodic(), and watchdog_start().

void rtimer_isr ( void )

The rtimer ISR.

Interrupts are only turned on when we have an rtimer task to schedule Once the interrupt fires, the task is called and then interrupts no longer get acknowledged until the next task needs scheduled.

Definition at line 137 of file rtimer-arch.c.

References lpm_exit, NVIC_INT_SM_TIMER, nvic_interrupt_disable(), nvic_interrupt_unpend(), and rtimer_run_next().

void spi_disable ( void )

Disables the SPI peripheral.

Note: Call this function to save power when the SPI is unused.

Definition at line 123 of file spi.c.

References SYS_CTRL_RCGCSSI.

void spi_set_mode	(	uint32_t	frame_format,
		uint32_t	clock_polarity,
		uint32_t	clock_phase,
		uint32_t	data_size
	)

Configure the SPI data and clock polarity and the data size.

This function configures the SSI peripheral to use a particular SPI configuration that a slave device requires. It should always be called before using the SPI bus as another driver could have changed the settings.

See section 19.4.4 in the CC2538 user guide for more information.

Parameters

frame_format	Set the SSI frame format. Use SSI_CR0_FRF_MOTOROLA, SSI_CR0_FRF_TI, or SSI_CR0_FRF_MICROWIRE.
clock_polarity	In Motorola mode, set whether the clock is high or low when idle. Use SSI_CR0_SPO or 0.
clock_phase	In Motorola mode, select whether data is valid on the first or second edge of the clock. Use SSI_CR0_SPH or 0.
data_size	The number of bits in each "byte" of data. Must be between 4 and 16, inclusive.

Definition at line 129 of file spi.c.

References SSI0_BASE, SSI_CR0, SSI_CR1, and SSI_CR1_SSE.

Modules

Files

Functions

Arch-specific SPI functions

Compiler configuration and platform-specific type definitions

Serial Boot Loader Backdoor configuration

Flash Memory configuration

Watchdog Timer configuration

USB 'core' configuration

Generic Configuration directives

uDMA Configuration and channel allocations

Character I/O Configuration

Network Stack Configuration

LPM configuration

IEEE address configuration

RF configuration

IPv6, RIME and network buffer configuration

Detailed Description

Macro Definition Documentation

Function Documentation