48 #include "sys/clock.h"
52 #include "dev/watchdog.h"
57 #ifdef USB_PULLUP_PORT
58 #define USB_PULLUP_PORT_BASE GPIO_PORT_TO_BASE(USB_PULLUP_PORT)
61 #define USB_PULLUP_PIN_MASK GPIO_PIN_MASK(USB_PULLUP_PIN)
66 #error Control endpoint size too big
70 #error Endpoint 1 size too big
74 #error Endpoint 2 size too big
77 #if USB_EP3_SIZE > 128
78 #error Endpoint 3 size too big
81 #if USB_EP4_SIZE > 256
82 #error Endpoint 4 size too big
85 #if USB_EP5_SIZE > 512
86 #error Endpoint 5 size too big
90 #define UDMA_SIZE_THRESHOLD 8
93 #define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
94 | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
95 | UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE)
97 #define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
98 | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
99 | UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8)
101 static const uint16_t ep_xfer_size[] = {
110 typedef struct _USBBuffer usb_buffer;
112 struct usb_endpoint {
117 struct process *event_process;
121 typedef struct usb_endpoint usb_endpoint_t;
123 #define EP_STATUS_IDLE 0
124 #define EP_STATUS_RX 1
125 #define EP_STATUS_TX 2
127 #define USB_EP_FLAGS_TYPE_MASK 0x03
128 #define USB_EP_FLAGS_TYPE_BULK 0x00
129 #define USB_EP_FLAGS_TYPE_CONTROL 0x01
130 #define USB_EP_FLAGS_TYPE_ISO 0x02
131 #define USB_EP_FLAGS_TYPE_INTERRUPT 0x03
132 #define USB_EP_FLAGS_ENABLED 0x04
134 #define EP_TYPE(ep) ((ep)->flags & USB_EP_FLAGS_TYPE_MASK)
135 #define IS_EP_TYPE(ep, type) (EP_TYPE(ep) == (type))
136 #define IS_CONTROL_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_CONTROL)
137 #define IS_BULK_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_BULK)
138 #define IS_INTERRUPT_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_INTERRUPT)
139 #define IS_ISO_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_ISO)
141 #define USBIIE_INEPxIE(x) (1 << x)
142 #define USBOIE_OUEPxIE(x) (1 << x)
143 #define EPxIF(x) (1 << x)
145 #define USB_READ_BLOCK 0x01
146 #define USB_WRITE_NOTIFY 0x02
147 #define USB_READ_NOTIFY 0x02
148 #define USB_READ_FAIL 0x04
151 #define EP_INDEX(addr) ((addr) & 0x7f)
154 #define EP_STRUCT(addr) &usb_endpoints[EP_INDEX(addr)];
157 #define EP_HW_NUM(addr) ((addr) & 0x7f)
159 static usb_endpoint_t usb_endpoints[USB_MAX_ENDPOINTS];
160 struct process *event_process = 0;
161 volatile static unsigned int events = 0;
162 static uint8_t ep0status;
164 static uint8_t ep0_tx(
void);
165 static uint8_t ep_tx(uint8_t ep_hw);
166 static void in_ep_interrupt_handler(uint8_t ep_hw);
167 static void out_ep_interrupt_handler(uint8_t ep_hw);
168 static void ep0_interrupt_handler(
void);
171 notify_process(
unsigned int e)
180 notify_ep_process(usb_endpoint_t *ep,
unsigned int e)
183 if(ep->event_process) {
189 usb_set_ep_event_process(
unsigned char addr,
struct process *p)
191 usb_endpoint_t *ep = EP_STRUCT(addr);
193 ep->event_process = p;
197 usb_arch_set_global_event_process(
struct process *p)
203 usb_arch_get_global_events(
void)
206 volatile unsigned int e;
219 usb_get_ep_events(uint8_t addr)
221 volatile unsigned int e;
223 usb_endpoint_t *ep = EP_STRUCT(addr);
236 read_hw_buffer(uint8_t *to, uint8_t hw_ep,
unsigned int len)
238 uint32_t fifo_addr =
USB_F0 + (hw_ep << 3);
244 (uint32_t)(to) + len - 1);
260 *to++ = REG(fifo_addr);
266 write_hw_buffer(uint8_t hw_ep, uint8_t *from,
unsigned int len)
268 uint32_t fifo_addr =
USB_F0 + (hw_ep << 3);
273 (uint32_t)(from) + len - 1);
290 REG(fifo_addr) = *from++;
300 for(e = 0; e < USB_MAX_ENDPOINTS; e++) {
301 if(usb_endpoints[e].flags & USB_EP_FLAGS_ENABLED) {
302 usb_buffer *buffer = usb_endpoints[e].buffer;
304 usb_endpoints[e].flags = 0;
305 usb_disable_endpoint(e);
307 buffer->flags &= ~USB_BUFFER_SUBMITTED;
308 buffer = buffer->next;
312 usb_arch_setup_control_endpoint(0);
340 #if defined(USB_PULLUP_PORT_BASE) && defined(USB_PULLUP_PIN_MASK)
342 GPIO_SET_PIN(USB_PULLUP_PORT_BASE, USB_PULLUP_PIN_MASK);
345 for(i = 0; i < USB_MAX_ENDPOINTS; i++) {
346 usb_endpoints[i].flags = 0;
347 usb_endpoints[i].event_process = 0;
367 usb_submit_recv_buffer(uint8_t addr, usb_buffer *buffer)
371 usb_endpoint_t *ep = EP_STRUCT(addr);
373 if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
377 if(buffer->data ==
NULL && EP_HW_NUM(addr) == 0) {
378 if(buffer->flags & USB_BUFFER_NOTIFY) {
379 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
388 tailp = &(*tailp)->next;
392 buffer->flags |= USB_BUFFER_SUBMITTED;
393 buffer = buffer->next;
397 if(!EP_HW_NUM(ep->addr)) {
398 if(REG(
USB_CS0) & USB_CS0_OUTPKT_RDY) {
399 ep0_interrupt_handler();
403 out_ep_interrupt_handler(EP_HW_NUM(ep->addr));
411 usb_submit_xmit_buffer(uint8_t addr, usb_buffer *buffer)
416 usb_endpoint_t *ep = EP_STRUCT(addr);
418 if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
424 if(EP_HW_NUM(addr) == 0) {
425 if(buffer->data ==
NULL) {
430 REG(
USB_CS0) = USB_CS0_CLR_OUTPKT_RDY | USB_CS0_DATA_END;
431 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
437 REG(
USB_CS0) = USB_CS0_CLR_OUTPKT_RDY;
443 tailp = &(*tailp)->next;
447 buffer->flags |= USB_BUFFER_SUBMITTED | USB_BUFFER_IN;
448 buffer = buffer->next;
452 if(EP_HW_NUM(ep->addr)) {
453 res = ep_tx(EP_HW_NUM(ep->addr));
460 if(res & USB_WRITE_NOTIFY) {
461 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
472 in_ep_setup(uint8_t addr)
474 uint8_t ei = EP_HW_NUM(addr);
475 usb_endpoint_t *ep = EP_STRUCT(addr);
478 REG(
USB_IIE) |= USBIIE_INEPxIE(ei);
491 out_ep_setup(uint8_t addr)
493 uint8_t ei = EP_HW_NUM(addr);
494 usb_endpoint_t *ep = EP_STRUCT(addr);
497 REG(
USB_OIE) |= USBOIE_OUEPxIE(ei);
510 ep_setup(uint8_t addr)
512 uint8_t ei = EP_HW_NUM(addr);
514 usb_endpoint_t *ep = EP_STRUCT(addr);
517 ep->flags |= USB_EP_FLAGS_ENABLED;
521 ep->xfer_size = ep_xfer_size[ei];
543 usb_arch_setup_iso_endpoint(uint8_t addr)
545 usb_endpoint_t *ep = EP_STRUCT(addr);
547 ep->flags = USB_EP_FLAGS_TYPE_ISO;
553 usb_arch_setup_control_endpoint(uint8_t addr)
555 usb_endpoint_t *ep = EP_STRUCT(addr);
557 ep->flags = USB_EP_FLAGS_TYPE_CONTROL;
563 usb_arch_setup_bulk_endpoint(uint8_t addr)
565 usb_endpoint_t *ep = EP_STRUCT(addr);
567 ep->flags = USB_EP_FLAGS_TYPE_BULK;
573 usb_arch_setup_interrupt_endpoint(uint8_t addr)
575 usb_endpoint_t *ep = EP_STRUCT(addr);
577 ep->flags = USB_EP_FLAGS_TYPE_INTERRUPT;
591 in_ep_dis(uint8_t addr)
594 REG(
USB_IIE) &= ~USBIIE_INEPxIE(EP_HW_NUM(addr));
597 REG(
USB_CSIL) = USB_CSIL_FLUSH_PACKET;
601 out_ep_dis(uint8_t addr)
604 REG(
USB_OIE) &= ~USBOIE_OUEPxIE(EP_HW_NUM(addr));
607 REG(
USB_CSOL) = USB_CSIL_FLUSH_PACKET;
611 usb_arch_disable_endpoint(uint8_t addr)
613 uint8_t ei = EP_HW_NUM(addr);
615 usb_endpoint_t *ep = EP_STRUCT(addr);
617 ep->flags &= ~USB_EP_FLAGS_ENABLED;
635 usb_arch_discard_all_buffers(uint8_t addr)
639 volatile usb_endpoint_t *ep = EP_STRUCT(addr);
648 buffer->flags &= ~USB_BUFFER_SUBMITTED;
649 buffer = buffer->next;
654 set_stall(uint8_t addr, uint8_t stall)
656 uint8_t ei = EP_HW_NUM(addr);
662 ep0status = EP_STATUS_IDLE;
663 REG(
USB_CS0) |= USB_CS0_SEND_STALL | USB_CS0_OUTPKT_RDY;
668 REG(
USB_CSIL) |= USB_CSIL_SEND_STALL;
670 REG(
USB_CSIL) &= ~USB_CSIL_SEND_STALL;
683 usb_arch_control_stall(uint8_t addr)
685 uint8_t ei = EP_HW_NUM(addr);
688 if(ei > USB_MAX_ENDPOINTS) {
700 usb_arch_halt_endpoint(uint8_t addr,
int halt)
702 uint8_t ei = EP_HW_NUM(addr);
704 usb_endpoint_t *ep = EP_STRUCT(addr);
706 if(ei > USB_MAX_ENDPOINTS) {
710 if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
723 if(ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
724 ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
725 if(ep->buffer->flags & USB_BUFFER_NOTIFY) {
726 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
728 ep->buffer = ep->buffer->next;
731 out_ep_interrupt_handler(EP_HW_NUM(addr));
739 usb_arch_set_configuration(uint8_t usb_configuration_value)
745 usb_arch_get_ep_status(uint8_t addr)
747 uint8_t ei = EP_INDEX(addr);
748 usb_endpoint_t *ep = EP_STRUCT(addr);
750 if(ei > USB_MAX_ENDPOINTS) {
758 usb_arch_set_address(uint8_t addr)
764 usb_arch_send_pending(uint8_t addr)
768 uint8_t ei = EP_INDEX(addr);
774 ret = REG(
USB_CS0) & USB_CS0_INPKT_RDY;
776 ret = REG(
USB_CSIL) & USB_CSIL_INPKT_RDY;
785 get_receive_capacity(usb_buffer *buffer)
787 unsigned int capacity = 0;
790 !(buffer->flags & (USB_BUFFER_IN | USB_BUFFER_SETUP | USB_BUFFER_HALT))) {
791 capacity += buffer->left;
792 buffer = buffer->next;
798 skip_buffers_until(usb_buffer *buffer,
unsigned int mask,
unsigned int flags,
801 while(buffer && !((buffer->flags & mask) == flags)) {
802 buffer->flags &= ~USB_BUFFER_SUBMITTED;
803 buffer->flags |= USB_BUFFER_FAILED;
804 if(buffer->flags & USB_BUFFER_NOTIFY) {
805 *resp |= USB_READ_NOTIFY;
807 buffer = buffer->next;
813 fill_buffers(usb_buffer *buffer, uint8_t hw_ep,
unsigned int len,
814 uint8_t short_packet)
820 if(buffer->left < len) {
828 read_hw_buffer(buffer->data, hw_ep, t);
836 buffer->flags &= ~(USB_BUFFER_SUBMITTED | USB_BUFFER_SHORT_PACKET);
837 if(buffer->flags & USB_BUFFER_NOTIFY) {
838 res |= USB_READ_NOTIFY;
840 buffer = buffer->next;
844 buffer->flags |= USB_BUFFER_SHORT_PACKET;
847 if((buffer->left == 0) || (buffer->flags & USB_BUFFER_PACKET_END)) {
848 buffer->flags &= ~USB_BUFFER_SUBMITTED;
849 if(buffer->flags & USB_BUFFER_NOTIFY) {
850 res |= USB_READ_NOTIFY;
852 buffer = buffer->next;
855 if(buffer->left && !(buffer->flags & USB_BUFFER_SHORT_END)) {
856 buffer->flags |= USB_BUFFER_FAILED;
857 res |= USB_READ_FAIL;
859 buffer->flags &= ~USB_BUFFER_SUBMITTED;
860 if(buffer->flags & USB_BUFFER_NOTIFY) {
861 res |= USB_READ_NOTIFY;
863 buffer = buffer->next;
867 usb_endpoints[hw_ep].buffer = buffer;
873 ep0_get_setup_pkt(
void)
877 skip_buffers_until(usb_endpoints[0].buffer, USB_BUFFER_SETUP,
878 USB_BUFFER_SETUP, &res);
880 usb_endpoints[0].buffer = buffer;
882 if(!buffer || buffer->left < 8) {
883 return USB_READ_BLOCK;
886 read_hw_buffer(buffer->data, 0, 8);
889 buffer->flags &= ~USB_BUFFER_SUBMITTED;
890 if(buffer->flags & USB_BUFFER_NOTIFY) {
891 res |= USB_READ_NOTIFY;
894 if(buffer->data[6] || buffer->data[7]) {
895 REG(
USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY;
896 ep0status = buffer->data[0] & 0x80 ? EP_STATUS_TX : EP_STATUS_RX;
901 usb_endpoints[0].buffer = buffer->next;
907 ep0_get_data_pkt(
void)
910 uint8_t short_packet = 0;
911 usb_buffer *buffer = usb_endpoints[0].buffer;
915 return USB_READ_BLOCK;
918 if(buffer->flags & (USB_BUFFER_SETUP | USB_BUFFER_IN)) {
921 buffer->flags |= USB_BUFFER_FAILED;
922 buffer->flags &= ~USB_BUFFER_SUBMITTED;
923 if(buffer->flags & USB_BUFFER_NOTIFY) {
924 res |= USB_READ_NOTIFY;
930 usb_endpoints[0].buffer = buffer->next;
932 REG(
USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY | USB_CS0_DATA_END;
934 ep0status = EP_STATUS_IDLE;
938 if(get_receive_capacity(buffer) < len) {
940 return USB_READ_BLOCK;
943 if(len < usb_endpoints[0].xfer_size) {
947 res = fill_buffers(buffer, 0, len, short_packet);
951 ep0status = EP_STATUS_IDLE;
953 REG(
USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY;
961 usb_buffer *buffer = usb_endpoints[0].buffer;
962 unsigned int len = usb_endpoints[0].xfer_size;
963 uint8_t data_end = 0;
967 if((REG(
USB_CS0) & USB_CS0_INPKT_RDY) || (ep0status != EP_STATUS_TX)) {
975 if(!(buffer->flags & USB_BUFFER_IN)) {
983 if(buffer->left < len) {
990 buffer->left -= copy;
991 write_hw_buffer(0, buffer->data, copy);
992 buffer->data += copy;
993 if(buffer->left == 0) {
994 if(buffer->flags & USB_BUFFER_SHORT_END) {
1002 buffer->flags &= ~USB_BUFFER_SUBMITTED;
1003 if(buffer->flags & USB_BUFFER_NOTIFY) {
1004 res |= USB_WRITE_NOTIFY;
1006 buffer = buffer->next;
1015 usb_endpoints[0].buffer = buffer;
1022 if(data_end || !buffer) {
1023 ep0status = EP_STATUS_IDLE;
1024 REG(
USB_CS0) |= USB_CS0_INPKT_RDY | USB_CS0_DATA_END;
1026 REG(
USB_CS0) |= USB_CS0_INPKT_RDY;
1033 ep0_interrupt_handler(
void)
1040 if(cs0 & USB_CS0_SENT_STALL) {
1043 ep0status = EP_STATUS_IDLE;
1045 if(cs0 & USB_CS0_SETUP_END) {
1048 ep0status = EP_STATUS_IDLE;
1051 if(cs0 & USB_CS0_OUTPKT_RDY) {
1052 if(ep0status == EP_STATUS_IDLE) {
1053 res = ep0_get_setup_pkt();
1055 res = ep0_get_data_pkt();
1058 if(res & USB_READ_NOTIFY) {
1059 notify_ep_process(&usb_endpoints[0], USB_EP_EVENT_NOTIFICATION);
1061 if(res & USB_READ_BLOCK) {
1068 if(res & USB_WRITE_NOTIFY) {
1069 notify_ep_process(&usb_endpoints[0], USB_EP_EVENT_NOTIFICATION);
1074 ep_tx(uint8_t ep_hw)
1078 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1080 len = ep->xfer_size;
1086 if(!ep->buffer || !(ep->buffer->flags & USB_BUFFER_IN)) {
1093 if(ep->buffer->left < len) {
1094 copy = ep->buffer->left;
1100 ep->buffer->left -= copy;
1106 while(REG(
USB_CSIL) & USB_CSIL_INPKT_RDY) {
1110 write_hw_buffer(EP_INDEX(ep_hw), ep->buffer->data, copy);
1111 ep->buffer->data += copy;
1113 if(ep->buffer->left == 0) {
1114 if(ep->buffer->flags & USB_BUFFER_SHORT_END) {
1123 ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
1124 if(ep->buffer->flags & USB_BUFFER_NOTIFY) {
1125 res |= USB_WRITE_NOTIFY;
1127 ep->buffer = ep->buffer->next;
1135 REG(
USB_CSIL) |= USB_CSIL_INPKT_RDY;
1141 ep_get_data_pkt(uint8_t ep_hw)
1145 uint8_t short_packet = 0;
1146 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1149 return USB_READ_BLOCK;
1152 if(ep->buffer->flags & USB_BUFFER_HALT) {
1162 if(get_receive_capacity(ep->buffer) < pkt_len) {
1163 return USB_READ_BLOCK;
1166 if(pkt_len < ep->xfer_size) {
1170 res = fill_buffers(ep->buffer, ep_hw, pkt_len, short_packet);
1178 out_ep_interrupt_handler(uint8_t ep_hw)
1182 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1189 REG(
USB_CSOL) &= ~USB_CSOL_SENT_STALL;
1194 REG(
USB_CSOL) &= ~USB_CSOL_OVERRUN;
1198 res = ep_get_data_pkt(ep_hw);
1200 if(res & USB_READ_NOTIFY) {
1201 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
1207 in_ep_interrupt_handler(uint8_t ep_hw)
1210 #if USB_ARCH_WRITE_NOTIFY
1212 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1218 if(csl & USB_CSIL_SENT_STALL) {
1219 REG(
USB_CSIL) &= ~USB_CSIL_SENT_STALL;
1222 if(csl & USB_CSIL_UNDERRUN) {
1223 REG(
USB_CSIL) &= ~USB_CSIL_UNDERRUN;
1226 #if USB_ARCH_WRITE_NOTIFY
1227 if(!(csl & USB_CSIL_INPKT_RDY)) {
1229 if(res & USB_WRITE_NOTIFY) {
1230 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
1244 ENERGEST_ON(ENERGEST_TYPE_IRQ);
1249 ep0_interrupt_handler();
1251 for(i = 1; i < 6; i++) {
1252 if(ep_in_if & EPxIF(i)) {
1253 in_ep_interrupt_handler(i);
1258 for(i = 1; i < 6; i++) {
1259 if(ep_out_if & EPxIF(i)) {
1260 out_ep_interrupt_handler(i);
1266 notify_process(USB_EVENT_RESET);
1269 notify_process(USB_EVENT_RESUME);
1272 notify_process(USB_EVENT_SUSPEND);
1275 ENERGEST_OFF(ENERGEST_TYPE_IRQ);
uint8_t udma_channel_get_mode(uint8_t channel)
Retrieve the current mode for a channel.
#define USB_CSIH
IN EPs control and status (high)
#define USB_CSOH_ISO
Selects OUT endpoint type.
#define USB_CTRL_PLL_LOCKED
PLL locked status.
#define USB_CIF
Common USB interrupt flags.
#define USB_CTRL_PLL_EN
48-MHz USB PLL enable
#define USB_CSOL_OUTPKT_RDY
OUT packet read in OUT FIFO.
void process_poll(struct process *p)
Request a process to be polled.
#define USB_CNT0
Number of RX bytes in EP0 FIFO (Alias for USB_CNT0_CNTL)
void udma_channel_sw_request(uint8_t channel)
Generate a software trigger to start a transfer.
Header file for the ARM Nested Vectored Interrupt Controller.
#define USB_CNTL
Number of bytes in EP{1-5} OUT FIFO (low) (Alias for USB_CNT0_CNTL)
#define USB_CSOL_SEND_STALL
Reply with STALL to OUT tokens.
Header file with register and macro declarations for the cc2538 GPIO module.
#define USB_F0
Endpoint-0 FIFO.
#define USB_CSOL_OVERRUN
OUT packet can not be loaded into OUT FIFO.
void udma_set_channel_src(uint8_t channel, uint32_t src_end)
Sets the channels source address.
#define USB_OIE
Out EPs interrupt-enable mask.
#define NULL
The null pointer.
Header file with declarations for the I/O Control module.
#define USB_OIF
OUT endpoint interrupt flags.
Header file with register, macro and function declarations for the cc2538 micro-DMA controller module...
#define USB_IIF
IN EPs and EP0 interrupt flags.
void nvic_interrupt_enable(uint32_t intr)
Enables interrupt intr.
#define USB_CSOL_SENT_STALL
STALL handshake sent.
void udma_channel_enable(uint8_t channel)
Enables a uDMA channel.
#define USB_CIF_RESUMEIF
Resume interrupt flag.
#define USB_CIE
Common USB interrupt mask.
Header file with register manipulation macro definitions.
Header file for the energy estimation mechanism
#define USB_INDEX
Current endpoint index register.
#define USB_CSOH
OUT EPs control and status (high)
#define USB_CIF_RSTIF
Reset interrupt flag.
void watchdog_periodic(void)
Writes the WDT clear sequence.
#define USB_CS0
EP0 Control and Status (Alias for USB_CS0_CSIL)
#define USB_CIF_SUSPENDIF
Suspend interrupt flag.
void udma_set_channel_dst(uint8_t channel, uint32_t dst_end)
#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to output.
#define USB_ARCH_CONF_RX_DMA_CHAN
USB -> RAM DMA channel.
#define USB_ARCH_CONF_DMA
Change to Enable/Disable USB DMA.
#define USB_IIE_EP0IE
EP0 interrupt enable.
#define USB_CNTH
Number of bytes in EP{1-5} OUT FIFO (high)
void udma_channel_mask_set(uint8_t channel)
Disable peripheral triggers for a uDMA channel.
void udma_set_channel_control_word(uint8_t channel, uint32_t ctrl)
Configure the channel's control word.
#define USB_CTRL_USB_EN
USB enable.
#define USB_IIF_EP0IF
EP0 Interrupt flag.
#define USB_ARCH_CONF_TX_DMA_CHAN
RAM -> USB DMA channel.
#define USB_ADDR
Function address.
#define USB_MAXI
MAX packet size for IN EPs{1-5}.
#define USB_CTRL
USB control register.
void lpm_register_peripheral(lpm_periph_permit_pm1_func_t permit_pm1_func)
Register a peripheral function which will get called by the LPM module to get 'permission' to drop to...
#define USB_CS0_CLR_SETUP_END
Listed as reserved in the UG, is this right?
#define USB_CSIL
IN EPs control and status (low) (Alias for USB_CS0_CSIL)
#define GPIO_SET_PIN(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE high.
#define udma_xfer_size(len)
Calculate the value of the xfersize field in the control structure.
uint8_t nvic_interrupt_en_save(uint32_t intr)
Checks the interrupt enabled status for intr.
#define USB_IIE
IN EPs and EP0 interrupt mask.
#define USB_MAXO
MAX packet size for OUT EPs.
void nvic_interrupt_en_restore(uint32_t intr, uint8_t v)
Enables interrupt intr if v > 0.
#define USB_CSOL
OUT EPs control and status (low)
Header file with declarations for the cc2538 USB registers.