16 #define PRINTF(...) printf(__VA_ARGS__)
22 static char allow_deep_sleep = 1;
24 static void update_llwu();
26 volatile uint32_t llwu_inhibit_lls_sema = 0;
27 volatile uint32_t llwu_inhibit_vlps_sema = 0;
28 volatile uint32_t llwu_inhibit_stop_sema = 0;
50 PRINTF(
"LLWU: new controller\n");
56 c->allow_llwu = allow;
58 PRINTF(
"LLWU: allow LLWU %d\n", allow_deep_sleep);
78 PRINTF(
"LLWU: sleep %u....\n", allow_deep_sleep);
83 if(!allow_deep_sleep ||
84 ((
SIM->SCGC4 & SIM_SCGC4_UART0_MASK) && (
UART0->S2 & UART_S2_RAF_MASK)) ||
85 ((
SIM->SCGC4 & SIM_SCGC4_UART1_MASK) && (
UART1->S2 & UART_S2_RAF_MASK)) ||
86 ((
SIM->SCGC4 & SIM_SCGC4_UART2_MASK) && (
UART2->S2 & UART_S2_RAF_MASK)) ||
87 ((
SIM->SCGC4 & SIM_SCGC4_UART3_MASK) && (
UART3->S2 & UART_S2_RAF_MASK)) ||
88 ((
SIM->SCGC1 & SIM_SCGC1_UART4_MASK) && (
UART4->S2 & UART_S2_RAF_MASK)) ||
89 ((
SIM->SCGC1 & SIM_SCGC1_UART5_MASK) && (
UART5->S2 & UART_S2_RAF_MASK))) {
93 else if(llwu_inhibit_stop_sema != 0) {
95 PRINTF(
"LLWU: STOP inhibited\n");
97 }
else if(llwu_inhibit_vlps_sema != 0) {
100 }
else if(llwu_inhibit_lls_sema != 0) {
112 if(module < LLWU_WAKEUP_MODULE_END) {
113 LLWU->ME |= (1 << (
const uint8_t)module);
114 PRINTF(
"LLWU_ME 0x%02x\n",
LLWU->ME);
121 if(module < LLWU_WAKEUP_MODULE_END) {
122 LLWU->ME &= ~(1 << (
const uint8_t)module);
123 PRINTF(
"LLWU_ME 0x%02x\n",
LLWU->ME);
131 if(pin >= LLWU_WAKEUP_PIN_END) {
138 tmp = *(&
LLWU->PE1 + (((
const uint8_t)pin) / LLWU_WAKEUP_PIN_REG_SIZE));
140 tmp = (tmp & ~(LLWU_WAKEUP_EDGE_MASK << ((pin % LLWU_WAKEUP_PIN_REG_SIZE) *
141 LLWU_WAKEUP_EDGE_WIDTH)));
143 tmp |= ((edge & LLWU_WAKEUP_EDGE_MASK) << ((pin % LLWU_WAKEUP_PIN_REG_SIZE) *
144 LLWU_WAKEUP_EDGE_WIDTH));
145 *(&
LLWU->PE1 + (((
const uint8_t)pin) / LLWU_WAKEUP_PIN_REG_SIZE)) = tmp;
146 PRINTF(
"LLTU 1 0x%02x\n",
LLWU->PE1);
147 PRINTF(
"LLTU 2 0x%02x\n",
LLWU->PE2);
148 PRINTF(
"LLTU 3 0x%02x\n",
LLWU->PE3);
149 PRINTF(
"LLTU 4 0x%02x\n",
LLWU->PE4);
Linked list manipulation routines.
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
void * list_item_next(void *item)
Get the next item following this item.
enum llwu_wakeup_pin llwu_wakeup_pin_t
enum that maps physical pins to wakeup pin numbers in LLWU module
#define LLWU
Peripheral LLWU base pointer.
void __attribute__((interrupt))
This ISR handles most of the business interacting with the 1-wire bus.
#define NULL
The null pointer.
#define SIM
Peripheral SIM base pointer.
#define UART3
Peripheral UART3 base pointer.
void llwu_sleep(void)
Sleep until some process is polled, ie interrupt occurs.
K60 hardware register header wrapper.
#define DEBUGGER_BREAK(sig)
Make the CPU signal to the debugger and break execution by issuing a bkpt instruction.
void power_modes_init(void)
void llwu_set_allow(llwu_control_t *c, char allow)
Method for a controller to allow or disallow deep sleep.
void list_init(list_t list)
Initialize a list.
Provide common UART routines for MK60DZ10.
#define UART4
Peripheral UART4 base pointer.
void * list_head(list_t list)
Get a pointer to the first element of a list.
#define UART1
Peripheral UART1 base pointer.
void list_add(list_t list, void *item)
Add an item at the end of a list.
Power mode switching functions for the K60 CPU.
#define UART2
Peripheral UART2 base pointer.
#define LIST(name)
Declare a linked list.
enum llwu_wakeup_module llwu_wakeup_module_t
Internal modules whose interrupts are mapped to LLWU wake up sources.
#define UART0
Peripheral UART0 base pointer.
#define UART5
Peripheral UART5 base pointer.
void llwu_register(llwu_control_t *c)
Register as a controller for llwu.
#define BITBAND_REG(Reg, Bit)
Macro to access a single bit of a peripheral register (bit band region 0x40000000 to 0x400FFFFF) usin...